Abstract:
A reset level in a pixel cell is boosted by switching ON a reset transistor of the pixel cell to charge the floating diffusion to a first reset level during a reset operation. A select transistor is switched from OFF to ON during the floating diffusion reset operation to discharge an output terminal of an amplifier transistor. The reset transistor is switched OFF after the output terminal of the amplifier transistor has been discharged in response to the switching ON of the select transistor. The output terminal of the amplifier transistor charges to a static level after being discharged. The floating diffusion coupled to the input terminal of the amplifier transistor follows the output terminal of the amplifier transistor across an amplifier capacitance coupled between the input terminal and the output terminal of the amplifier transistor to boost the reset level of the floating diffusion.
Abstract:
A reset level in a pixel cell is boosted by switching ON a reset transistor of the pixel cell to charge the floating diffusion to a first reset level during a reset operation. A select transistor is switched from OFF to ON during the floating diffusion reset operation to discharge an output terminal of an amplifier transistor. The reset transistor is switched OFF after the output terminal of the amplifier transistor has been discharged in response to the switching ON of the select transistor. The output terminal of the amplifier transistor charges to a static level after being discharged. The floating diffusion coupled to the input terminal of the amplifier transistor follows the output terminal of the amplifier transistor across an amplifier capacitance coupled between the input terminal and the output terminal of the amplifier transistor to boost the reset level of the floating diffusion.
Abstract:
A reduced random telegraph signal (RTS)-noise CMOS image sensor includes a pixel and a correlated double sampling (CDS) circuit electrically connected to the pixel. The CDS circuit is characterized by a CDS period that includes a reference sample period and an image data sample period. The image sensor also includes a bitline, a bitline connection switch between the pixel and a readout circuit connected to the pixel, and a bitline switch controller. The bitline transmits a transfer gate signal as a bitline signal having a non-zero value during a first time period entirely between the reference sample period and the image data sample period. The bitline switch controller is electrically connected to and configured to control the bitline connection switch such that the bitline connection switch is closed during the entire CDS period except for a single continuous open period that includes the first time period.