公开(公告)号：US20220416395A1

公开(公告)日：2022-12-29

申请号：US17482016

申请日：2021-09-22

Applicant: National Chi Nan University

Inventor： Yo-Sheng Lin ,  Kai-Siang Lan ,  Bo-Shun Chen

IPC: H01P5/16

Abstract: A power divider includes an input capacitor, and first and second transmission lines (TLs). The first TL includes an input portion (IP), a transmission portion (TP) and an output portion (OP). The second TL includes a TP and an OP. The IP is for receiving an input signal, and is connected to the TPs of the first and second TLs. For each of the first and second TLs, the TP has a length that is one-twelfth of a target wavelength, and is connected to the OP. The OPs of the first and second TLs are for cooperatively outputting a pair of output signals which are in-phase and each of which has a frequency equal to that of the input signal. The input capacitor is connected between ground and the IP.

公开(公告)号：US12191555B2

公开(公告)日：2025-01-07

申请号：US17946627

申请日：2022-09-16

Applicant: National Chi Nan University

Inventor： Yo-Sheng Lin ,  Bo-Shun Chen ,  Yu-Cian Peng

IPC: H03H7/42 ,  H01P5/18

Abstract: A power divider includes first to third transmission lines (TLs) and first to third capacitors. The second TL includes a first transmission portion (TP) and a first output portion (OP). The first TP is connected between the first TL and the first OP. The third TL includes a second TP and a second OP. The second TP is connected between the first TL and the second OP. The first capacitor is connected between ground and a common node of the first TL and the first and second TPs. The second capacitor is connected between ground and a terminal of the first OP distal from the first TP. The third capacitor is connected between ground and a terminal of the second OP distal from the second TP.

公开(公告)号：US11848476B2

公开(公告)日：2023-12-19

申请号：US17482016

申请日：2021-09-22

Applicant: National Chi Nan University

Inventor： Yo-Sheng Lin ,  Kai-Siang Lan ,  Bo-Shun Chen

IPC: H01P5/16

CPC classification number: H01P5/16

Abstract: A power divider includes an input capacitor, and first and second transmission lines (TLs). The first TL includes an input portion (IP), a transmission portion (TP) and an output portion (OP). The second TL includes a TP and an OP. The IP is for receiving an input signal, and is connected to the TPs of the first and second TLs. For each of the first and second TLs, the TP has a length that is one-twelfth of a target wavelength, and is connected to the OP. The OPs of the first and second TLs are for cooperatively outputting a pair of output signals which are in-phase and each of which has a frequency equal to that of the input signal. The input capacitor is connected between ground and the IP.