公开(公告)号：US20250036715A1

公开(公告)日：2025-01-30

申请号：US18715083

申请日：2021-12-03

Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

Inventor： Saki HATTA ,  Hiroyuki UZAWA ,  Shuhei YOSHIDA ,  Yuko IINUMA ,  Yuya OMORI ,  Daisuke KOBAYASHI ,  Ken NAKAMURA

IPC: G06F17/15

Abstract: There is provided a data processing device 10 that performs a convolution operation of two pieces of input data of 2M×N bits (N is a positive integer and M is a natural number) width with a minimum accuracy of the convolution operation being N bits, and performs processing corresponding to a plurality of the consecutive M, the data processing device 10 including: a product-sum operation unit 101 that performs a product-sum operation according to the value of M; a shifter 102 that performs shift processing on a result of a product-sum operation of the product-sum operation unit 101 in a case where the value of M is not 0; an addition unit 103 that performs addition processing on each output of the shifter 102 or the product-sum operation unit 101 according to the value of M; a selector 105 that selects an output from the addition unit 103 according to the value of M; a cumulative addition unit 106 that cumulatively adds the outputs from the selector 105; and a cumulative addition memory 107 that stores outputs from the cumulative addition unit 106 in a process of a convolution operation.