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公开(公告)号：US12010042B2
公开(公告)日：2024-06-11
申请号：US17779157
申请日：2019-11-28
发明人： Ioannis (Giannis) Patronas , Paraskevas Bakopoulos , Eitan Zahavi , Eran Aharon , Elad Mentovich
IPC分类号： H04L49/253
CPC分类号： H04L49/254
摘要： A routing controller (30) includes an interface (68) and multiple processors (60) The interface is configured to receive a permutation (76) defining requested interconnections between N input ports and N output ports of a Benes network (24). The Benes network includes multiple 2-by-2 switches (42), and is reducible in a plurality of nested subnetworks associated with respective nesting levels, down to irreducible subnetworks including a single 2-by-2 switch. The multiple processors are configured to collectively determine a setting of the 2-by-2 switches that implements the received permutation, including determining sub-settings for two or more subnetworks of a given nesting level in parallel, and to configure the multiple 2-by-2 switches of the Benes network in accordance with the determined setting.
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2.发明授权公开(公告)号：US11005724B1
公开(公告)日：2021-05-11
申请号：US16240749
申请日：2019-01-06
发明人： Yuval Shpigelman , Eitan Zahavi
摘要： A design tool for network interconnection includes a processor coupled to an input device and to an output device. The processor receives via the input device design parameters including: (i) a number G of groups of network elements, (ii) a number S of spines associated with each group, and (iii) a number P of ports that each spine has for connecting to other spines, using short-cable connections or long-cable connections. The processor determines an interconnection plan by specifying connections among spines belonging to different groups, in a clique or a bipartite scheme, so that for given values of G, S and P, (i) a number of the long-cable connections among the spines is minimized, and (ii) a number of inter-group connections is balanced among the G groups up to a deviation of a single connection. The processor outputs to the output device instructions for applying the interconnection plan.
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公开(公告)号：US10826784B2
公开(公告)日：2020-11-03
申请号：US16246505
申请日：2019-01-13
发明人： Shahar Sarfaty , Dror Bohrer , Eitan Zahavi
摘要： A method includes, in a Network Interface Controller (NIC) that communicates over a network, generating indications pertaining to a performance of the NIC. The indications are classified with respect to severity. At least some of the indications, for which the severity exceeds a predefined severity threshold, are assembled in performance notification packets. The performance notification packets are sent over the network.
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公开(公告)号：US20240291776A1
公开(公告)日：2024-08-29
申请号：US18655261
申请日：2024-05-05
发明人： Ioannis (Giannis) Patronas , Paraskevas Bakopoulos , Eitan Zahavi , Eran Aharon , Elad Mentovich
IPC分类号： H04L49/253
CPC分类号： H04L49/254
摘要： A routing controller (30) includes an interface (68) and multiple processors (60). The interface is configured to receive a permutation (76) defining requested interconnections between N input ports and N output ports of a Benes network (24). The Benes network includes multiple 2-by-2 switches (42), and is reducible in a plurality of nested subnetworks associated with respective nesting levels, down to irreducible subnetworks including a single 2-by-2 switch. The multiple processors are configured to collectively determine a setting of the 2-by-2 switches that implements the received permutation, including determining sub-settings for two or more subnetworks of a given nesting level in parallel, and to configure the multiple 2-by-2 switches of the Benes network in accordance with the determined setting.
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公开(公告)号：US20240187440A1
公开(公告)日：2024-06-06
申请号：US18083981
申请日：2022-12-19
发明人： Ioannis (Giannis) Patronas , Paraskevas Bakopoulos , Nikolaos Argyris , Dimitrios Kalavrouziotis , Dimitrios Syrivelis , Elad Mentovich , Prethvi Ramesh Kashinkunti , Louis Bennie Capps, JR. , Julie Irene Marcelle Bernauer , Eitan Zahavi
CPC分类号： H04L63/1433 , H04L45/28 , H04Q11/0005
摘要： Systems and methods for providing resilience in network communications are provided that leverage novel switch device architectures. An example switch device for providing resilience in network communications includes a signal routing mechanism configured to selectively provide communication between at least one first network port and two of a plurality of second network ports. The signal routing mechanism receives an indication of a malfunction associated with one of the two of the plurality of second network ports and communicably connects the at least one first network port with the other of the two of the plurality of second network port. The first network ports may be positioned in a first array and each of the plurality of second network ports may be positioned in a second array.
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公开(公告)号：US10998032B2
公开(公告)日：2021-05-04
申请号：US16268507
申请日：2019-02-06
发明人： George Elias , Hillel Chapman , Eitan Zahavi , Elad Mentovich
IPC分类号： G11C11/406
摘要： One or more blocks of dynamic random access memory are embedded together with a processor and a data bus on an integrated circuit. The data bus has a bandwidth b for general operation including memory access, the block of dynamic random access memory further requiring data refresh at a refresh rate r. The block thus forms an eDRAM on the integrated circuit, typically an ASIC. A refresh controller embedded with the eDRAM may control refresh by clocking the data bus at a rate higher than the rate of the data bus to accommodate both the required memory access and the required data refresh.
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公开(公告)号：US20200162394A1
公开(公告)日：2020-05-21
申请号：US16191536
申请日：2018-11-15
发明人： Aviv Barnea , Ido Shamay , Eitan Zahavi , Yossef Itigin , Rotem Damsker
IPC分类号： H04L12/841 , H04L12/875 , H04L12/801 , H04L12/823
摘要： A method including providing a hardware-implemented networking system having a sending device, the sending device being configured to communicate with a receiving device via a communications medium, and performing the following at the sending device: providing an initial value for transmission timeout and setting a current value for transmission timeout to the initial value, sending one or more packets associated with a given queue from the sending device to the receiving device via the communications medium, setting a packet transmission timeout timer associated with the given queue to the current value for transmission timeout; and upon expiration of a packet transmission timeout timer associated with the given queue, performing the following: A. determining whether one or more packets have been successfully received by the receiving device, and performing one or both of the following steps B and C: B. if one or more packets have been successfully received by the receiving device, decreasing the current value for transmission timeout, and C. if no packets have been successfully received by the receiving device, increasing the current value for transmission timeout. Related apparatus and methods are also provided.
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公开(公告)号：US12132633B1
公开(公告)日：2024-10-29
申请号：US18458191
申请日：2023-08-30
发明人： Eitan Zahavi
IPC分类号： H04L43/0882 , H04L45/48
CPC分类号： H04L43/0882 , H04L45/48
摘要： A system for bandwidth estimation includes an interface and a processor. The interface communicates with a fat-tree (FT) network including multiple switches including (i) leaf switches belonging to a bottom level, (ii) spine switches belonging to a top level and (iii) intermediate switches belonging to one or more intermediate levels. Links connect between selected ones of the switches. The processor is to calculate, for a given level of the FT network that is divided into multiple groups of switches, oversubscription ratios for the respective groups, an oversubscription ratio of a group being indicative of a ratio between (i) a first available bandwidth on the links connecting the switches in the group to a lower level, and (ii) a second available bandwidth on the links connecting the switches in the group to a higher level, and to report a figure of merit of the FT network based on the oversubscription ratios.
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公开(公告)号：US20240089194A1
公开(公告)日：2024-03-14
申请号：US17990686
申请日：2022-11-20
发明人： Ariel Almog , Eitan Zahavi , Idan Burstein , Zachy Haramaty , Aviv Barnea
IPC分类号： H04L45/00 , H04L67/1097 , H04L69/22
CPC分类号： H04L45/22 , H04L45/66 , H04L67/1097 , H04L69/22
摘要： A network adapter includes a port and one or more circuits. The port is to send packets to a network in accordance with a Remote Direct Memory Access over Converged Ethernet (RoCE) protocol. The one or more circuits are to decide whether a packet is permitted to undergo Adaptive Routing (AR) in being routed through the network, to mark the packet with an indication of whether the packet is permitted to undergo AR, and to send the marked packet to the network via the port.
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公开(公告)号：US20240089147A1
公开(公告)日：2024-03-14
申请号：US18513565
申请日：2023-11-19
发明人： Richard Graham , Lion Levi , Gil Bloch , Daniel Marcovitch , Noam Bloch , Yong Qin , Yaniv Blumenfeld , Eitan Zahavi
CPC分类号： H04L12/40182 , G06F12/0246 , H04B7/0456 , H04L12/44 , H04W24/10 , H04W88/06
摘要： A method includes providing a plurality of processes interconnected by a network, each of the plurality of processes being configured to hold a block of data destined for others of the plurality of processes. A set of data for all-to-all data exchange is received from one or more of the processes. The set of data is configured as a plurality of blocks of data in a matrix as matrix data, the matrix being distributed among the plurality of processes. The matrix data is transposed by changing the position of selected blocks of data of the plurality of blocks of data relative to the other blocks of data of the plurality of the blocks of data, without changing the structure of each of the blocks of data. The transposed matrix data is over the network and is then received, repacked, and conveyed to destination processes.
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