公开(公告)号：US09735144B2

公开(公告)日：2017-08-15

申请号：US15014685

申请日：2016-02-03

Applicant: MediaTek Inc.

Inventor： Shih-Fan Chen ,  Tai-Hsiang Lai

IPC: H01L27/02 ,  H01L29/08 ,  H01L29/73 ,  H01L29/06 ,  H01L27/12 ,  H01L27/07 ,  H01L27/08 ,  H01L21/762

CPC classification number: H01L27/0259 ,  H01L21/76224 ,  H01L27/0255 ,  H01L27/0711 ,  H01L27/0814 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/73

Abstract: An electrostatic discharge (ESD) protection device includes a semiconductor layer having a first doped region, a second doped region, and an intrinsic region formed therein, and a plurality of insulating elements respectively formed therein. The plurality of insulating elements is respectively formed in a portion of the semiconductor layer between the first, second and third doped regions. The intrinsic region is formed at least in the semiconductor layer between one of the second and third regions and the other one of the second and third regions or between one of the second and third regions and the first region. The first doped region is formed with a first conductivity type, and the second and third doped regions are formed with a second conductivity type opposite to the first conductivity type.

公开(公告)号：US20200066709A1

公开(公告)日：2020-02-27

申请号：US16529831

申请日：2019-08-02

Applicant: MEDIATEK INC.

Inventor： Shih-Fan Chen ,  Kuo-Chun Hsu ,  Tai-Hsiang Lai

IPC: H01L27/02 ,  H01L23/60 ,  G05F1/10

Abstract: A semiconductor device includes a P-type substrate, a first isolation region, a plurality of first N-well walls, and an electrostatic discharge (ESD) clamp circuit. The first isolation region is formed within the P-type substrate. The ESD clamp circuit is arranged to discharge ESD current upon detection of an ESD event, and includes a clamping component that is arranged to provide a discharge path for the ESD current. The clamping component is formed on a region wrapped in the first isolation layer and the first N-well walls.