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公开(公告)号:US20250103241A1
公开(公告)日:2025-03-27
申请号:US18644111
申请日:2024-04-24
Inventor: Hoi Jun YOO , Sang Jin KIM
IPC: G06F3/06
Abstract: A DRAM is configured using a triple-mode memory cell that supports a computation mode, a memory mode, and a data conversion mode by one cell and converts modes as necessary, and an AI accelerator using the same is provided, so that a dataflow may be reconfigured according to a structure and a size of an AI neural network (so-called deep neural network) to be trained.