公开(公告)号：US11995355B2

公开(公告)日：2024-05-28

申请号：US18309038

申请日：2023-04-28

Applicant: KIOXIA CORPORATION

Inventor： Yuta Aiba ,  Naomi Takeda ,  Masanobu Shirakawa

IPC: G11C19/08 ,  G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0608 ,  G06F3/0679 ,  G11C19/0841

Abstract: According to one embodiment, a memory system includes a shift register memory and a controller. The shift register memory includes data storing shift strings. The controller changes a shift pulse, which is to be applied to the data storing shift strings from which first data is read by applying a first shift pulse, to a second shift pulse to write second data to the data storing shift strings and to read the second data from the data storing shift strings. The controller creates likelihood information of data read from the data storing shift strings in accordance with a read result of the second data. The controller performs soft decision decoding for the first data using the likelihood information.

公开(公告)号：US11579796B2

公开(公告)日：2023-02-14

申请号：US17197667

申请日：2021-03-10

Applicant: Kioxia Corporation

Inventor： Tomoya Sanuki ,  Yuta Aiba ,  Hitomi Tanaka ,  Masayuki Miura ,  Mie Matsuo ,  Toshio Fujisawa ,  Takashi Maeda

IPC: G06F3/00 ,  G06F3/06

Abstract: A memory system has a memory, a first substrate on which the memory is mounted and which is set to a temperature of −40[° C.] or lower, a controller configured to control the memory; and a second substrate on which the controller is mounted, which is set to a temperature of −40[° C.] or higher, and which transmits and receives a signal to and from the first substrate via a signal transmission cable.

公开(公告)号：US11675535B2

公开(公告)日：2023-06-13

申请号：US17015893

申请日：2020-09-09

Applicant: Kioxia Corporation

Inventor： Yuta Aiba ,  Naomi Takeda ,  Masanobu Shirakawa

IPC: G06F3/06 ,  G11C19/08

CPC classification number: G06F3/0659 ,  G06F3/0608 ,  G06F3/0679 ,  G11C19/0841

Abstract: According to one embodiment, a memory system includes a shift register memory and a controller. The shift register memory includes data storing shift strings. The controller changes a shift pulse, which is to be applied to the data storing shift strings from which first data is read by applying a first shift pulse, to a second shift pulse to write second data to the data storing shift strings and to read the second data from the data storing shift strings. The controller creates likelihood information of data read from the data storing shift strings in accordance with a read result of the second data. The controller performs soft decision decoding for the first data using the likelihood information.