公开(公告)号：US09985912B1

公开(公告)日：2018-05-29

申请号：US14871706

申请日：2015-09-30

Applicant: Juniper Networks, Inc.

Inventor： Rahul Wagh ,  Kapil Suri ,  Gurjeet Singh ,  Harshad B Agashe ,  Srihari R. Vegesna ,  Dinesh Jaiswal

IPC: H04L12/861 ,  H04L12/935 ,  H04L12/801 ,  H04L12/933

CPC classification number: H04L49/30 ,  H04L47/18 ,  H04L49/1569 ,  H04L49/1576

Abstract: A system and method of transferring cells through a switch fabric having a shared memory crossbar switch, a plurality of cell receive blocks and a plurality of cell transmit blocks. The system determines, based on a number of cells queued up in respective output buffers in the cell transmit blocks, output buffers in the cell transmit blocks that can receive cells on a low latency path. The cells transferred include first cells that can be transferred on the low latency path and second cells that cannot be transferred via the low latency path. The first cells are transferred via a bypass mechanism in shared memory to the output buffers. The second cells are transferred by writing the second cells to shared memory, reading the second cells from shared memory and transferring the second cells read from shared memory to the output buffers in the cell transmit blocks.