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1.发明授权Circuit for generating a digital or analog signal as a function of doppler frequency 失效用于产生数字或模拟信号作为多普勒频率的函数的电路
公开(公告)号：US3958243A
公开(公告)日：1976-05-18
申请号：US560060
申请日：1975-03-20
Applicant: John L. Linder
Inventor： John L. Linder
CPC classification number: G01S13/66 , G01S11/10 , G01S13/586 , H03K4/48
Abstract: A control circuit having a digital memory for providing sweep voltages to ceivers in a doppler satellite tracking station of proper amplitude and duration to ensure searching in the correct doppler frequency range. An internally generated ramp function voltage is combined with a reference voltage to produce a composite sweep signal for the receiver. The reference voltage level is determined either from a set of digi-switches or from a digital memory circuit which outputs a digital signal that is a function of the frequency of a received doppler signal.
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公开(公告)号：US3971923A
公开(公告)日：1976-07-27
申请号：US564022
申请日：1975-03-31
Applicant: John L. Linder
Inventor： John L. Linder
CPC classification number: H03K4/48 , G01S11/10 , G01S13/586 , G01S13/66
Abstract: A control circuit having a digital memory for providing sweep voltages to ceivers in a doppler satellite tracking station of proper amplitude and duration to ensure searching in the correct doppler frequency range. An internally generated ramp function voltage is combined with a reference voltage to produce a composite sweep signal for the receiver. The reference voltage level is determined either from a set of digi-switches or from a digital memory circuit which outputs a digital signal that is a function of the frequency of a received doppler signal.
Abstract translation: 一种具有数字存储器的控制电路，用于向多普勒卫星跟踪站中的接收机提供适当幅度和持续时间的扫描电压，以确保在正确的多普勒频率范围内进行搜索。 内部产生的斜坡函数电压与参考电压组合以产生用于接收器的复合扫描信号。 参考电压电平由一组数字开关或数字存储器电路确定，该数字存储器电路输出作为接收的多普勒信号的频率的函数的数字信号。
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3.发明授权
公开(公告)号：US3935539A
公开(公告)日：1976-01-27
申请号：US516540
申请日：1974-10-21
Applicant: John L. Linder
Inventor： John L. Linder
CPC classification number: H03K5/26 , G01R23/005 , G01S3/42
Abstract: A digital frequency correlator circuit for comparing the frequencies of a urality of a-c signals to determine if they are coherent within a predetermined number of cycles. The a-c signals are converted into digital numbers representing their frequencies. The digital numbers are subtracted and the difference is compared, utilizing an exclusive-or circuit, with a predetermined number of cycles. If the difference is greater than the predetermined number of cycles, a logic 0 is outputted. If the difference is equal to or less than the predetermined number of cycles, a logic 1 is outputted.
Abstract translation: 一种数字频率相关器电路，用于比较多个a-c信号的频率，以确定它们在预定数量的周期内是否相干。 a-c信号被转换成表示其频率的数字数字。 减去数字数字，并利用专用或电路以预定数量的周期进行比较。 如果该差大于预定的周期数，则输出逻辑0。 如果差值等于或小于预定循环次数，则输出逻辑1。
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