公开(公告)号：US12111908B2

公开(公告)日：2024-10-08

申请号：US18215924

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Eduardo Alban ,  Shabbir Ahmed ,  Marcio Juliato ,  Christopher Gutierrez ,  Qian Wang ,  Vuk Lesi ,  Manoj Sastry

IPC: G06F21/85 ,  G06F13/20 ,  G06F21/44 ,  H04L12/40

CPC classification number: G06F21/44 ,  G06F13/20 ,  G06F21/85 ,  H04L12/40 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: Systems, apparatuses, and methods to identify an electronic control unit transmitting a message on a communication bus, such as an in-vehicle network bus, are provided. ECUs transmit messages by manipulating voltage on conductive lines of the bus. Observation circuitry can observe voltage signals associated with the transmission at a point on the in-vehicle network bus. A distribution can be generated from densities of the voltage signals. ECUs can be identified and/or fingerprinted based on the distributions.

公开(公告)号：US11570186B2

公开(公告)日：2023-01-31

申请号：US16712479

申请日：2019-12-12

Applicant: Intel Corporation

Inventor： Marcio Juliato ,  Manoj Sastry ,  Michael Kara-Ivanov ,  Aviad Kipnis ,  Shabbir Ahmed ,  Christopher Gutierrez ,  Vuk Lesi

IPC: H04L9/40 ,  H04L12/40 ,  H04L47/31

Abstract: Techniques and screening messages based on tags in an automotive environment, such as, messages communicated via a communication bus, like the CAN bus. Messages can be tagged with either a binary or probabilistic tag indicating whether the message is fraudulent. ECUs coupled to the CAN bus can receive the messages and the message tags and can determine whether to fully consume the message based on the tag.

公开(公告)号：US20220224701A1

公开(公告)日：2022-07-14

申请号：US17706955

申请日：2022-03-29

Applicant: Intel Corporation

Inventor： Christopher Gutierrez ,  Vuk Lesi ,  Manoj Sastry ,  Christopher Hall ,  Marcio Juliato ,  Shabbir Ahmed ,  Qian Wang

IPC: H04L9/40 ,  H04J3/06

Abstract: Techniques to secure a time sensitive network are described. An apparatus may establish a data stream between a first device and a second device in a network domain, the network domain includes a plurality of switching nodes, receive messages from the first device by the second device in the network domain, the messages to comprise time information to synchronize a first clock for the first device and a second clock for the second device to a network time for the network domain, update a correction field for a received message with a residence time and time delay value by the second device, determine whether the updated message is benign or malicious, update the correction field for the updated message with an inference time when the updated message is benign, and prevent relay of the updated message to other devices in the network domain when the updated message is malicious.

公开(公告)号：US20220014540A1

公开(公告)日：2022-01-13

申请号：US17484197

申请日：2021-09-24

Applicant: Intel Corporation

Inventor： Marcio Juliato ,  Javier Perez-Ramirez ,  Vuk Lesi ,  Dave Cavalcanti ,  Manoj Sastry ,  Christopher Gutierrez ,  Qian Wang ,  Shabbir Ahmed

IPC: H04L29/06

Abstract: Systems, apparatuses and methods may provide for technology that detects one or more non-compliant nodes with respect to a timing schedule, detects one or more compliant nodes with respect to the timing schedule, and identifies a malicious node based on positions of the one or more non-compliant nodes and the one or more compliant nodes in a network topography. The non-compliant node(s) and the compliant node(s) may be detected based on post-synchronization messages, historical attribute data and/or plane diversity data.

公开(公告)号：US20210026955A1

公开(公告)日：2021-01-28

申请号：US17031140

申请日：2020-09-24

Applicant: Intel Corporation

Inventor： Marcio Juliato ,  Manoj Sastry ,  Shabbir Ahmed ,  Christopher Gutierrez ,  Qian Wang ,  Vuk Lesi

IPC: G06F21/55 ,  G06F21/71 ,  G06F21/85

Abstract: A platform comprising numerous reconfigurable circuit components arranged to operate as primary and redundant circuits is provided. The platform further comprises security circuitry arranged to monitor the primary circuit for anomalies and reconfigurable circuit arranged to disconnect the primary circuit from a bus responsive to detection of an anomaly. Furthermore, the present disclosure provides for the quarantine, refurbishment and designation as redundant, the anomalous circuit.

公开(公告)号：US20240364702A1

公开(公告)日：2024-10-31

申请号：US18766326

申请日：2024-07-08

Applicant: INTEL CORPORATION

Inventor： Marcio Juliato ,  Javier Perez-Ramirez ,  Mikhail Galeev ,  Christopher Gutierrez ,  Dave Cavalcanti ,  Manoj Sastry ,  Vuk Lesi

IPC: H04L9/40 ,  H04L9/06 ,  H04L69/22 ,  H04L69/28

CPC classification number: H04L63/105 ,  H04L9/0656 ,  H04L63/1483 ,  H04L69/22 ,  H04L69/28

Abstract: Systems and methods to detect attacks on the clocks of devices in time sensitive networks are described. Particularly, the disclosed systems and methods provide detection and mitigation of timing synchronization attacks based on pseudo-random numbers generated and used to select and authenticate timing of transmission of messages in protected transmission windows.

公开(公告)号：US12081561B2

公开(公告)日：2024-09-03

申请号：US17483723

申请日：2021-09-23

Applicant: Intel Corporation

Inventor： Javier Perez-Ramirez ,  Mikhail Galeev ,  Marcio Juliato ,  Christopher Gutierrez ,  Dave Cavalcanti ,  Manoj Sastry ,  Kevin Stanton ,  Vuk Lesi

IPC: H04L9/40

CPC classification number: H04L63/1416 ,  H04L63/1425

Abstract: Systems and methods to detect attacks on the clocks of devices. In time sensitive networks are described. Particularly, the disclosed systems and methods provide detection and mitigation of timing synchronization attacks based on key performance indicators related to the protecting transmission windows in data streams of the time sensitive networks.

公开(公告)号：US12047398B2

公开(公告)日：2024-07-23

申请号：US18077205

申请日：2022-12-07

Applicant: Intel Corporation

Inventor： Marcio Juliato ,  Manoj Sastry ,  Michael Kara-Ivanov ,  Aviad Kipnis ,  Shabbir Ahmed ,  Christopher Gutierrez ,  Vuk Lesi

IPC: H04L9/40 ,  H04L12/40 ,  H04L47/31

CPC classification number: H04L63/1416 ,  H04L12/40 ,  H04L47/31 ,  H04L63/0236 ,  H04L63/126 ,  H04L63/1466 ,  H04L2012/40215

Abstract: Techniques and screening messages based on tags in an automotive environment, such as, messages communicated via a communication bus, like the CAN bus. Messages can be tagged with either a binary or probabilistic tag indicating whether the message is fraudulent. ECUs coupled to the CAN bus can receive the messages and the message tags and can determine whether to fully consume the message based on the tag.

公开(公告)号：US11720662B2

公开(公告)日：2023-08-08

申请号：US16994219

申请日：2020-08-14

Applicant: Intel Corporation

Inventor： Eduardo Alban ,  Shabbir Ahmed ,  Marcio Juliato ,  Christopher Gutierrez ,  Qian Wang ,  Vuk Lesi ,  Manoj Sastry

IPC: G06F21/44 ,  G06F21/85 ,  H04L12/40 ,  G06F13/20

CPC classification number: G06F21/44 ,  G06F13/20 ,  G06F21/85 ,  H04L12/40 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: Systems, apparatuses, and methods to identify an electronic control unit transmitting a message on a communication bus, such as an in-vehicle network bus, are provided. ECUs transmit messages by manipulating voltage on conductive lines of the bus. Observation circuitry can observe voltage signals associated with the transmission at a point on the in-vehicle network bus. A distribution can be generated from densities of the voltage signals. ECUs can be identified and/or fingerprinted based on the distributions.

公开(公告)号：US20220303034A1

公开(公告)日：2022-09-22

申请号：US17829042

申请日：2022-05-31

Applicant: INTEL CORPORATION

Inventor： Vuk Lesi ,  Christopher Gutierrez ,  Manoj Sastry ,  Marcio Juliato ,  Shabbir Ahmed ,  Qian Wang

IPC: H04J3/06

Abstract: Techniques for clock manager monitoring for time sensitive networks are described. An apparatus, comprises a clock circuitry to manage a clock for a device, a processing circuitry coupled to the clock circuitry, the processing circuitry to execute instructions to perform operations for a clock manager, the clock manager to receive messages with time information for a network and generate clock manager control information to adjust the clock to a network time for the network, and a detector coupled to the processing circuitry and the clock circuitry, the detector to receive the clock manager control information, generate model control information based on a clock model, compare the clock manager control information with the model control information to generate difference information, and determine whether to generate an alert based on the difference information. Other embodiments are described and claimed.