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1.发明授权Method, apparatus, and system for controlling power consumption of unused hardware of a link interface 有权用于控制链路接口的未使用硬件的功耗的方法，装置和系统公开(公告)号：US09552045B2
公开(公告)日：2017-01-24
申请号：US14426597
申请日：2014-03-20
申请人： Intel Corporation
发明人： Vickneswaran Ragavan
CPC分类号： G06F1/3234 , G06F1/3253 , G06F1/3287 , G06F13/00 , G06F15/16 , H04L49/00 , Y02D10/151 , Y02D10/171
摘要： In an embodiment, a plurality of hardware buffers each may store information associated with one or more virtual channels. In turn, a configuration logic is to determine an identifier corresponding to a maximum number of virtual channels commonly supported by first and second devices coupled via a link and to obtain a control value based on the identifier. A gate logic coupled to the configuration logic is to provide an operating voltage to corresponding ones of the hardware buffers based on the control value. In this way, the operating voltage can be withheld from at least one of the hardware buffers when the maximum number of virtual channels is less than the plurality of hardware buffers. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，多个硬件缓冲器可以存储与一个或多个虚拟通道相关联的信息。 反过来，配置逻辑是确定对应于通过经由链路耦合的第一和第二设备通常支持的虚拟通道的最大数量的标识符，并且基于标识符获得控制值。 耦合到配置逻辑的门逻辑是基于控制值向相应的硬件缓冲器提供工作电压。 以这种方式，当虚拟通道的最大数目小于多个硬件缓冲器时，可以从至少一个硬件缓冲器中截取工作电压。 描述和要求保护其他实施例。
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2.发明申请A Method, Apparatus, And System For Controlling Power Consumption Of Unused Hardware Of A Link Interface 有权用于控制链路接口的未使用硬件的功耗的方法，装置和系统公开(公告)号：US20160259394A1
公开(公告)日：2016-09-08
申请号：US14426597
申请日：2014-03-20
申请人： INTEL CORPORATION
发明人： Vickneswaran Ragavan
IPC分类号： G06F1/32
CPC分类号： G06F1/3234 , G06F1/3253 , G06F1/3287 , G06F13/00 , G06F15/16 , H04L49/00 , Y02D10/151 , Y02D10/171
摘要： In an embodiment, a plurality of hardware buffers each may store information associated with one or more virtual channels. In turn, a configuration logic is to determine an identifier corresponding to a maximum number of virtual channels commonly supported by first and second devices coupled via a link and to obtain a control value based on the identifier. A gate logic coupled to the configuration logic is to provide an operating voltage to corresponding ones of the hardware buffers based on the control value. In this way, the operating voltage can be withheld from at least one of the hardware buffers when the maximum number of virtual channels is less than the plurality of hardware buffers. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，多个硬件缓冲器可以存储与一个或多个虚拟通道相关联的信息。 反过来，配置逻辑是确定对应于通过经由链路耦合的第一和第二设备通常支持的虚拟通道的最大数量的标识符，并且基于标识符获得控制值。 耦合到配置逻辑的门逻辑是基于控制值向相应的硬件缓冲器提供工作电压。 以这种方式，当虚拟通道的最大数目小于多个硬件缓冲器时，可以从至少一个硬件缓冲器中截取工作电压。 描述和要求保护其他实施例。
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