公开(公告)号：US11447876B2

公开(公告)日：2022-09-20

申请号：US16962084

申请日：2018-09-21

申请人： Institute of Microelectronics, Chinese Academy of Sciences

发明人： Huilong Zhu ,  Xiaogen Yin ,  Chen Li ,  Anyan Du ,  Yongkui Zhang

IPC分类号： C23F1/16 ,  H01L21/306

摘要： An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.

公开(公告)号：US20210193533A1

公开(公告)日：2021-06-24

申请号：US17250770

申请日：2018-10-31

申请人： Institute of Microelectronics, Chinese Academy of Sciences

发明人： Huilong ZHU ,  Yongkui ZHANG ,  Xiaogen YIN ,  Chen Li ,  Yongbo LIU ,  Kunpeng JIA

IPC分类号： H01L21/8238 ,  H01L27/092

摘要： The disclosed technology provides a semiconductor device, a manufacturing method thereof, and an electronic device including the device. An example semiconductor device includes a substrate; a first device and a second device on the substrate. Each of the first device and the second device include a first source/drain layer, a channel layer, and a second source layer that are sequentially stacked, from bottom to top, on the substrate, and a gate stack around at least a part of an outer periphery of the channel layer, with sidewalls of the respective channel layers of the first device and the second device extending at least partially along different crystal planes or crystal plane families.

公开(公告)号：US11827988B2

公开(公告)日：2023-11-28

申请号：US17891025

申请日：2022-08-18

申请人： Institute of Microelectronics, Chinese Academy of Sciences

发明人： Huilong Zhu ,  Xiaogen Yin ,  Chen Li ,  Anyan Du ,  Yongkui Zhang

IPC分类号： C23F1/16 ,  H01L21/306

CPC分类号： C23F1/16 ,  H01L21/30604

摘要： An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.