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公开(公告)号:USD661022S1
公开(公告)日:2012-05-29
申请号:US29409033
申请日:2011-12-20
申请人: Hung-Yu Huang , Cing-Fong Jheng
设计人: Hung-Yu Huang , Cing-Fong Jheng
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公开(公告)号:US20110084745A1
公开(公告)日:2011-04-14
申请号:US12577857
申请日:2009-10-13
申请人: Hung-Yu Huang , Chin-Tien Chang
发明人: Hung-Yu Huang , Chin-Tien Chang
IPC分类号: H03K5/12
CPC分类号: H03K19/00361
摘要: An embodiment of a slew-rate enhancement output stage is disclosed. A first slew-rate enhancement circuit receives a first control voltage and outputs a first voltage. A second slew-rate enhancement circuit receives a second control voltage and outputs a second voltage. A first PMOS transistor includes a first first terminal coupled to a high voltage source, a first control terminal receiving the first voltage, and a first second terminal coupled to a voltage output terminal. A first NMOS transistor includes a second first terminal coupled to the voltage output terminal, a second control terminal for receiving the second voltage, and a second second terminal coupled to a low voltage source. The first voltage is higher than the first control voltage, and the second voltage is lower than the second control voltage.
摘要翻译: 公开了压摆率增强输出级的实施例。 第一压摆率增强电路接收第一控制电压并输出第一电压。 第二转换速率增强电路接收第二控制电压并输出第二电压。 第一PMOS晶体管包括耦合到高电压源的第一第一端子,接收第一电压的第一控制端子和耦合到电压输出端子的第一第二端子。 第一NMOS晶体管包括耦合到电压输出端的第二第一端子,用于接收第二电压的第二控制端子和耦合到低电压源的第二第二端子。 第一电压高于第一控制电压,第二电压低于第二控制电压。
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公开(公告)号:US20130234760A1
公开(公告)日:2013-09-12
申请号:US13413309
申请日:2012-03-06
申请人: Jia-Hui Wang , Hung-Yu Huang
发明人: Jia-Hui Wang , Hung-Yu Huang
IPC分类号: H03B1/00
CPC分类号: G11C7/1057
摘要: An output buffer including a P-type transistor, an N-type transistor, a first comparison unit and a second comparison unit is provided. The P-type transistor has a first source, a first gate and a first drain. The first source receives a system voltage, and the first drain outputs an output voltage. The N-type transistor has a second drain, a second gate and a second source. The second drain is coupled to the first drain, and the second source receives a ground voltage. The first comparison unit and the second comparison unit respectively output a high voltage or a low voltage to the first gate and the second gate according to a comparison result of an input voltage and the output voltage, and respectively regulate a first tail current flowing into the first comparison unit and a second tail current flowing from the second comparison unit accordingly.
摘要翻译: 提供了包括P型晶体管,N型晶体管,第一比较单元和第二比较单元的输出缓冲器。 P型晶体管具有第一源极,第一栅极和第一漏极。 第一个源接收系统电压,第一个漏极输出一个输出电压。 N型晶体管具有第二漏极,第二栅极和第二源极。 第二漏极耦合到第一漏极,第二源极接收地电压。 第一比较单元和第二比较单元根据输入电压和输出电压的比较结果分别向第一栅极和第二栅极输出高电压或低电压,并分别调节流入 第一比较单元和第二尾电流相应地从第二比较单元流出。
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公开(公告)号:US08310280B2
公开(公告)日:2012-11-13
申请号:US13096938
申请日:2011-04-28
申请人: Hung-Yu Huang , Chen-Yu Wang
发明人: Hung-Yu Huang , Chen-Yu Wang
IPC分类号: H03K5/153
CPC分类号: H03F3/45219 , H03F3/45192 , H03F3/45475 , H03F2203/45726
摘要: A half-power buffer amplifier is disclosed. A buffer stage includes a first-half buffer stage and a second-half buffer stage, wherein an output of the first-half buffer stage is controllably fed back to a rail-to-rail differential amplifier, and an output of the second-half buffer stage is controllably fed back to the rail-to-rail differential amplifier. The switch network controls the connection between the outputs of the buffer stage and an output node of the half-power buffer amplifier in a manner such that a same pixel, with respect to different frames, of a display panel is driven by the same rail-to-rail differential amplifier. In one embodiment, the rail-to-rail differential amplifier and the buffer stage comprise half-power transistors operated within and powered by half of a full range spanning from power to ground.
摘要翻译: 公开了一种半功率缓冲放大器。 缓冲级包括前半缓冲级和后半缓冲级,其中前半缓冲级的输出被可控地反馈到轨到轨差分放大器,并且下半部分的输出 缓冲级可控地反馈给轨到轨差分放大器。 开关网络以这样的方式控制缓冲级的输出和半功率缓冲放大器的输出节点之间的连接,使得相对于显示面板的不同帧的相同像素由相同的轨道 - 轨到轨差分放大器。 在一个实施例中,轨到轨差分放大器和缓冲器级包括半功率晶体管,其在从功率到地电跨度的全范围内运行并由其驱动。
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公开(公告)号:US20110260758A1
公开(公告)日:2011-10-27
申请号:US13096938
申请日:2011-04-28
申请人: Hung-Yu Huang , CHEN-YU WANG
发明人: Hung-Yu Huang , CHEN-YU WANG
IPC分类号: H03B1/00
CPC分类号: H03F3/45219 , H03F3/45192 , H03F3/45475 , H03F2203/45726
摘要: A half-power buffer amplifier is disclosed. A buffer stage includes a first-half buffer stage and a second-half buffer stage, wherein an output of the first-half buffer stage is controllably fed back to a rail-to-rail differential amplifier, and an output of the second-half buffer stage is controllably fed back to the rail-to-rail differential amplifier. The switch network controls the connection between the outputs of the buffer stage and an output node of the half-power buffer amplifier in a manner such that a same pixel, with respect to different frames, of a display panel is driven by the same rail-to-rail differential amplifier. In one embodiment, the rail-to-rail differential amplifier and the buffer stage comprise half-power transistors operated within and powered by half of a full range spanning from power to ground.
摘要翻译: 公开了一种半功率缓冲放大器。 缓冲级包括前半缓冲级和后半缓冲级,其中前半缓冲级的输出被可控地反馈到轨到轨差分放大器,并且下半部分的输出 缓冲级可控地反馈给轨到轨差分放大器。 开关网络以这样的方式控制缓冲级的输出和半功率缓冲放大器的输出节点之间的连接,使得相对于显示面板的不同帧的相同像素由相同的轨道 - 轨到轨差分放大器。 在一个实施例中,轨到轨差分放大器和缓冲器级包括半功率晶体管,其在从功率到地电跨度的全范围内运行并由其驱动。
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公开(公告)号:US08022730B2
公开(公告)日:2011-09-20
申请号:US12577851
申请日:2009-10-13
申请人: Hung-Yu Huang
发明人: Hung-Yu Huang
IPC分类号: H03K19/094
CPC分类号: H03K19/01721 , H03K5/023 , H03K5/12
摘要: A driving auxiliary circuit receiving an input voltage to control an output voltage of an operational amplifier via a first switch and a second switch is provided. A pull-low circuit turns on the first switch, including a first input terminal coupled to a high voltage source providing a high voltage and a first output terminal for controlling the voltage level of the output voltage. The output voltage is charged to be equal to the input voltage when the input voltage exceeds the output voltage. A pull-high circuit turns on the second switch, including a second input terminal coupled to the high voltage source providing the high voltage and a second output terminal for controlling the voltage level of the output voltage. The output voltage is discharged to be equal to the input voltage when the output voltage exceeds the input voltage.
摘要翻译: 提供接收经由第一开关和第二开关来控制运算放大器的输出电压的输入电压的驱动辅助电路。 拉低电路使第一开关导通,包括耦合到提供高电压的高电压源的第一输入端和用于控制输出电压的电压电平的第一输出端。 当输入电压超过输出电压时,输出电压被充电等于输入电压。 上拉电路接通第二开关,包括耦合到提供高电压的高电压源的第二输入端和用于控制输出电压的电压电平的第二输出端。 当输出电压超过输入电压时,输出电压被放电等于输入电压。
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公开(公告)号:US20110084733A1
公开(公告)日:2011-04-14
申请号:US12577851
申请日:2009-10-13
申请人: Hung-Yu Huang
发明人: Hung-Yu Huang
IPC分类号: H03B1/00
CPC分类号: H03K19/01721 , H03K5/023 , H03K5/12
摘要: A driving auxiliary circuit receiving an input voltage to control an output voltage of an operational amplifier via a first switch and a second switch is provided. A pull-low circuit turns on the first switch, including a first input terminal coupled to a high voltage source providing a high voltage and a first output terminal for controlling the voltage level of the output voltage. The output voltage is charged to be equal to the input voltage when the input voltage exceeds the output voltage. A pull-high circuit turns on the second switch, including a second input terminal coupled to the high voltage source providing the high voltage and a second output terminal for controlling the voltage level of the output voltage. The output voltage is discharged to be equal to the input voltage when the output voltage exceeds the input voltage.
摘要翻译: 提供接收经由第一开关和第二开关来控制运算放大器的输出电压的输入电压的驱动辅助电路。 拉低电路使第一开关导通,包括耦合到提供高电压的高电压源的第一输入端和用于控制输出电压的电压电平的第一输出端。 当输入电压超过输出电压时,输出电压被充电等于输入电压。 上拉电路接通第二开关,包括耦合到提供高电压的高电压源的第二输入端和用于控制输出电压的电压电平的第二输出端。 当输出电压超过输入电压时,输出电压被放电等于输入电压。
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公开(公告)号:US08232842B1
公开(公告)日:2012-07-31
申请号:US13045925
申请日:2011-03-11
申请人: Hung-Yu Huang
发明人: Hung-Yu Huang
IPC分类号: H03F3/18
CPC分类号: H03F3/45475 , H03F3/3011 , H03F2203/45248
摘要: An output buffer including a differential amplifier, a first and a second output stage, and a first and a second control stage is provided. The differential amplifier receives an input and a feedback signal and accordingly adjusts the level of the first and second control signals. The first control stage determines to provide a first current to an output terminal of the output buffer according to the level of the first and second control signals. The first control stage is biased under a high voltage and outputs one of the first control signal and the high voltage. The second control stage is biased under the low voltage and outputs one of the second control signal and the low voltage. The second output stage determines to provide a second current to the output terminal of the output buffer according to the signal generated by the first and second control stages.
摘要翻译: 提供了包括差分放大器,第一和第二输出级以及第一和第二控制级的输出缓冲器。 差分放大器接收输入和反馈信号,并因此调节第一和第二控制信号的电平。 第一控制级确定根据第一和第二控制信号的电平向输出缓冲器的输出端提供第一电流。 第一控制级在高电压下被偏置并输出第一控制信号和高电压之一。 第二控制级在低电压下被偏置并输出第二控制信号和低电压之一。 第二输出级确定根据由第一和第二控制级产生的信号向输出缓冲器的输出端提供第二电流。
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公开(公告)号:US08074319B2
公开(公告)日:2011-12-13
申请号:US12384911
申请日:2009-04-10
申请人: Hung-Yu Huang
发明人: Hung-Yu Huang
CPC分类号: A46B7/023 , A46B5/005 , A46B7/026 , A46B15/0055 , A46B15/0061 , A46B15/0069 , A46B15/0095 , Y10T403/7005
摘要: A foldable toothbrush has a shell, a cover, a mounting sleeve, a handle and multiple bristles. The cover is mounted pivotally to the shell and selectively covers the top opening and part of the front opening of the shell. The mounting sleeve is mounted pivotally to the shell and is selectively pivoted into the shell. The handle is mounted in the mounting sleeve and is selectively rotatable and slidable in the mounting sleeve. The bristles are attached to the handle. With the handle being rotatable and slidable in the mounting sleeve, the whole length of the toothbrush is adjustable to selectively adapt for using or stowing. Furthermore, the cover keeps the handle and the bristles clean when stowing.
摘要翻译: 可折叠牙刷具有外壳,盖,安装套,手柄和多个刷毛。 盖子枢转地安装到壳体上,并且选择性地覆盖壳体的顶部开口和前部开口的一部分。 安装套筒枢转地安装到壳体上并且选择性地枢转到壳体中。 手柄安装在安装套筒中,并可选择性地在安装套筒中旋转和滑动。 刷毛附在手柄上。 由于手柄可在安装套筒中旋转和滑动,所以牙刷的整个长度可调整以选择性地适应于使用或收起。 此外,盖子在收起时保持手柄和刷毛清洁。
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公开(公告)号:US07969217B2
公开(公告)日:2011-06-28
申请号:US12577857
申请日:2009-10-13
申请人: Hung-Yu Huang , Chin-Tien Chang
发明人: Hung-Yu Huang , Chin-Tien Chang
IPC分类号: H03K5/12
CPC分类号: H03K19/00361
摘要: An embodiment of a slew-rate enhancement output stage is disclosed. A first slew-rate enhancement circuit receives a first control voltage and outputs a first voltage. A second slew-rate enhancement circuit receives a second control voltage and outputs a second voltage. A first PMOS transistor includes a first first terminal coupled to a high voltage source, a first control terminal receiving the first voltage, and a first second terminal coupled to a voltage output terminal. A first NMOS transistor includes a second first terminal coupled to the voltage output terminal, a second control terminal for receiving the second voltage, and a second second terminal coupled to a low voltage source. The first voltage is higher than the first control voltage, and the second voltage is lower than the second control voltage.
摘要翻译: 公开了压摆率增强输出级的实施例。 第一压摆率增强电路接收第一控制电压并输出第一电压。 第二转换速率增强电路接收第二控制电压并输出第二电压。 第一PMOS晶体管包括耦合到高电压源的第一第一端子,接收第一电压的第一控制端子和耦合到电压输出端子的第一第二端子。 第一NMOS晶体管包括耦合到电压输出端的第二第一端子,用于接收第二电压的第二控制端子和耦合到低电压源的第二第二端子。 第一电压高于第一控制电压,第二电压低于第二控制电压。
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