公开(公告)号：US20240211758A1

公开(公告)日：2024-06-27

申请号：US18596134

申请日：2024-03-05

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jingyi Zhang ,  Yongzhong Wang ,  Yanlin Liu

IPC: G06N3/08 ,  G06N3/0495

CPC classification number: G06N3/08 ,  G06N3/0495

Abstract: A method for training an artificial intelligence (AI) model includes receiving a first training subtask at a first training unit, obtaining, by executing the first training subtask using a plurality of first training subunits, a first weight that is obtained through synchronization among the plurality of first training subunits, asynchronously receiving a second weight that is obtained by executing a second training subtask by at least one second training unit, and obtaining a weight of the AI model based on the first weight and the second weight.

公开(公告)号：US20240241808A1

公开(公告)日：2024-07-18

申请号：US18616076

申请日：2024-03-25

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fuchun Wei ,  Yongzhong Wang ,  Yayun Ji ,  Zhongqing Ouyang

IPC: G06F11/34

CPC classification number: G06F11/3466

Abstract: In an application performance testing method, a testing device obtains running status data of an application running on a computing chip and a memory access volume of each data access path of the computing chip in a running process of the application. The computing chip includes a plurality of memory units, and the data access path represents an access path between the memory units. The testing device determines running performance information of the application based on the running status data and the memory access volume of each data access path, and obtains a test result of the application based on the running performance information of the application and a performance test model established for the computing chip. The performance test model includes a performance test line of each data access path.

公开(公告)号：US20230162008A1

公开(公告)日：2023-05-25

申请号：US18150907

申请日：2023-01-06

Applicant: Huawei Technologies Co., Ltd.

Inventor： Yongzhong Wang ,  Fuchun Wei ,  Wei Zhang ,  Xiaoxin Xu

IPC: G06N3/0464 ,  G06N3/091

CPC classification number: G06N3/0464 ,  G06N3/091 ,  G06V10/82

Abstract: A data processing method includes obtaining first data and second data, where the first data and the second data are adjacent sequence data, and a sequence of the first data is prior to a sequence of the second data; padding third data between the first data and the second data according to a preset rule to obtain fourth data, where the third data isolates the first data from the second data; and completing data processing on the fourth data using a convolutional neural network.

公开(公告)号：US09998227B2

公开(公告)日：2018-06-12

申请号：US14059750

申请日：2013-10-22

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Weijian Chen ,  Yongzhong Wang

IPC: H04B10/00 ,  H04B10/50 ,  H04B10/588 ,  G01R19/00

CPC classification number: H04B10/50575 ,  G01R19/00 ,  H04B10/588

Abstract: The present invention discloses an optical module and a detection circuit thereof. The detection circuit includes: a sampling module, including a first potentiometer configured to convert a sampling current into a sampling voltage; an amplifying module, coupled to an output end of the sampling module and configured to amplify the sampling voltage; and an analog-to-digital conversion module, coupled to an output end of the amplifying module and configured to convert the amplified sampling voltage into a digital signal for detection. By arranging a potentiometer in a sampling module of a detection circuit, a resistance value of the sampling module can be adjusted, thereby adapting to responsivities of different modulators, increasing the locking speed of a modulator, preventing horizontal shifts of a locking point and a false locking point, and reducing the occupied PCB area.

公开(公告)号：US20140119723A1

公开(公告)日：2014-05-01

申请号：US14059750

申请日：2013-10-22

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Weijian CHEN ,  Yongzhong Wang

IPC: H04B10/516 ,  H04B10/077 ,  G01R19/00

CPC classification number: H04B10/50575 ,  G01R19/00 ,  H04B10/588

Abstract: The present invention discloses an optical module and a detection circuit thereof. The detection circuit includes: a sampling module, including a first potentiometer configured to convert a sampling current into a sampling voltage; an amplifying module, coupled to an output end of the sampling module and configured to amplify the sampling voltage; and an analog-to-digital conversion module, coupled to an output end of the amplifying module and configured to convert the amplified sampling voltage into a digital signal for detection. By arranging a potentiometer in a sampling module of a detection circuit, a resistance value of the sampling module can be adjusted, thereby adapting to responsivities of different modulators, increasing the locking speed of a modulator, preventing horizontal shifts of a locking point and a false locking point, and reducing the occupied PCB area.

Abstract translation: 本发明公开了一种光模块及其检测电路。 检测电路包括：采样模块，包括被配置为将采样电流转换成采样电压的第一电位器; 放大模块，耦合到采样模块的输出端并被配置为放大采样电压; 以及模数转换模块，耦合到放大模块的输出端并被配置为将放大的采样电压转换成用于检测的数字信号。 通过在检测电路的采样模块中配置电位器，可以调整采样模块的电阻值，从而适应不同调制器的响应性，增加调制器的锁定速度，防止锁定点的水平移位和假 锁定点，减少占用的PCB面积。