公开(公告)号：US12014791B2

公开(公告)日：2024-06-18

申请号：US17582802

申请日：2022-01-24

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Guangyi Qiao ,  Yangbin Diao ,  Jiantao Ma

IPC: G11C29/44 ,  G11C29/00 ,  G11C29/12 ,  G11C29/38

CPC classification number: G11C29/4401 ,  G11C29/1201 ,  G11C29/38 ,  G11C29/78

Abstract: The present disclosure provides example memory fault handling method, computer device, and computer-readable storage medium. One example method includes starting fault analysis for a memory at a first moment, where the fault analysis includes obtaining a current fault analysis result of the memory by analyzing historical fault information, the historical fault information includes fault information of the memory accumulated in a historical time period, and the historical time period is a time period before the first moment or a time period before the first moment and including the first moment. Fault recovery is started for the memory based on the current fault analysis result of the memory.

公开(公告)号：US20240311233A1

公开(公告)日：2024-09-19

申请号：US18673518

申请日：2024-05-24

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jiantao Ma ,  Yangbin Diao ,  Zheng Tan

IPC: G06F11/10

CPC classification number: G06F11/1044

Abstract: A hardware fault detection method includes, after performing error correction on data at a target location in an internal memory and writing corrected data into the target location, the internal memory controller reads first data from the target location. When determining that an error exists in the first data, the internal memory controller reports an error message, where the error message indicates that a hardware fault occurs at the target location. After finding that an error occurs in the data at the target location, the internal memory controller performs the error correction, write-back, and re-reading on the data, to further determine a type of the error occurring at the target location.

公开(公告)号：US20240176714A1

公开(公告)日：2024-05-30

申请号：US18437707

申请日：2024-02-09

Applicant: Huawei Technologies Co., Ltd.

Inventor： Yangbin Diao ,  Lei Yuan ,  Hua Chen ,  Yonggui Liang

IPC: G06F11/20

CPC classification number: G06F11/2094

Abstract: A system includes a processor and a memory. The processor locates a first memory chip that is faulty in a memory. After the first memory chip is isolated or replaced, the processor may reset the first memory chip when other memory chips in the memory are maintained to work normally. When a fault occurs in a memory chip in the memory, after the first memory chip that is faulty is isolated or replaced, the processor may independently reset the first memory chip without affecting the other memory chips in the memory. Resetting the first memory chip enables the first memory chip to restore to normal. A memory chip that can be normally used is used as a redundant memory chip or may continue to be used.