Abstract:
According to one aspect of the present disclosure, there is provided an apparatus that includes a battery, a Direct Current (DC) bus connected to the battery, and a DC to DC converter connected to the battery in parallel with the DC bus. A Motor Control Unit (MCU) is connected between the DC to DC converter and an electric motor. An Alternating Current (AC) port is connected to the electric motor. Switches connect the DC bus and an output of the DC to DC converter in series as an input to the MCU in a drive mode and disconnect the DC bus from the MCU in a charge mode.
Abstract:
A three-phase interleave converter with a TSSC includes: a filter circuit, a PFC circuit, a star connection between the filter circuit and the PFC circuit, and a second capacitor 7; where an output end of the filter circuit is connected to an input end of the PFC circuit by using a conducting wire; the star connection is set on the conducting wire connecting the filter circuit and the PFC circuit; one end of the star connection is connected to the conducting wire and the other end of the star connection is connected to one end of the second capacitor 7; and the other end of the second capacitor 7 is connected to an input wire. By using the foregoing solution, the number of capacitors is reduced from the original three to one. Therefore, fewer capacitors are used, and the volume is further reduced, thereby increasing the power density.
Abstract:
A memory management method, apparatus, and system are provided. The memory management method is performed by a memory management hardware accelerator, and the memory management hardware accelerator is coupled to an application subsystem and a communications subsystem. The application subsystem is configured to run a main operating system, and the communications subsystem is configured to run a communications operating system. The method includes: obtaining a set of memory addresses corresponding to dynamic memory space allocated by the main operating system to the communications subsystem, where the set of memory addresses includes one or more memory addresses; and sending some memory addresses in the set of memory addresses to a component of the communications subsystem.
Abstract:
A power supply device and a power supply method in a data center, and the power supply device includes at least two busbars, where a first busbar of the two busbars is connected to a first battery, a second busbar of the two busbars is connected to a second battery, and a voltage level of the first battery is different from a voltage level of the second battery, and at least one first bidirectional direct current converter configured to connect the first busbar and the second busbar such that the first busbar and the second busbar perform electrical energy transmission using the first bidirectional direct current converter.
Abstract:
A power supply device and a power supply method in a data center, and the power supply device includes at least two busbars, where a first busbar of the two busbars is connected to a first battery, a second busbar of the two busbars is connected to a second battery, and a voltage level of the first battery is different from a voltage level of the second battery, and at least one first bidirectional direct current converter configured to connect the first busbar and the second busbar such that the first busbar and the second busbar perform electrical energy transmission using the first bidirectional direct current converter.
Abstract:
A memory management method, apparatus, and system are provided. The memory management method is performed by a memory management hardware accelerator, and the memory management hardware accelerator is coupled to an application subsystem and a communications subsystem. The application subsystem is configured to run a main operating system, and the communications subsystem is configured to run a communications operating system. The method includes: obtaining a set of memory addresses corresponding to dynamic memory space allocated by the main operating system to the communications subsystem, where the set of memory addresses includes one or more memory addresses; and sending some memory addresses in the set of memory addresses to a component of the communications subsystem.