公开(公告)号：US20220385187A1

公开(公告)日：2022-12-01

申请号：US17880012

申请日：2022-08-03

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Zhangrong HU ,  Xin LIU ,  Caofei HENG ,  Kun WU

IPC: H02M3/158 ,  H02M1/08

Abstract: A switch-mode power supply includes a first switch circuit, at least one second switch circuit, a switch control circuit, a first inductor switching circuit, a coupled inductor, a voltage input end, and a voltage output end. The coupled inductor in the switch-mode power supply may be connected to the first switch circuit, to implement signal transmission between the coupled inductor and the first switch circuit. Signal transmission between the coupled inductor and the second switch circuit may be implemented under control of the first inductor switching circuit. Alternatively, the signal transmission between the coupled inductor and the second switch circuit may be disconnected under the control of the first inductor switching circuit.

公开(公告)号：US20150008891A1

公开(公告)日：2015-01-08

申请号：US14324728

申请日：2014-07-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Ming LI ,  Jianping WANG ,  Caofei HENG

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H02M1/08 ,  H03K17/063 ,  H03K2217/0081

Abstract: Embodiments of the present invention disclose a power supply conversion apparatus, where a control unit generates a corresponding control signal according to a received high level pulse width modulation signal, to control a first PMOS transistor Q3, a second PMOS transistor Q4, and a second NMOS transistor Q2 to be turned off successively, and then to make a first NMOS transistor Q1 conducted, which makes a voltage at a second end of a bootstrap capacitor to rise from ground potential to a PVDD, so that a voltage at a first end of the bootstrap capacitor rises to a PVDD+AVDD as the voltage at the second end rises, and a gate turn-on voltage of the first NMOS transistor Q1 reaches the PVDD+AVDD.

Abstract translation: 本发明的实施例公开了一种电源转换装置，其中控制单元根据接收的高电平脉冲宽度调制信号产生相应的控制信号，以控制第一PMOS晶体管Q3，第二PMOS晶体管Q4和第二NMOS 晶体管Q2依次关断，然后使导通的第一NMOS晶体管Q1导通，使自举电容器的第二端的电压从地电位上升到PVDD，使得第一端的电压 随着第二端的电压上升，自举电容上升到PVDD + AVDD，第一NMOS晶体管Q1的栅极导通电压达到PVDD + AVDD。