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公开(公告)号:US10244495B1
公开(公告)日:2019-03-26
申请号:US15718492
申请日:2017-09-28
Inventor: Wilson Wang Kit Thong , Victor Man Wai Kwan , Elaine Jihui Zhang , Jie Chuai , Ching Hong Leung , Yan Lam Lee , Eric Kong Chau Tsang
Abstract: Methods and systems which provide for synchronization target selection by configuring a network device to reselect a synchronization signal transmission timeslot for synchronization target searching by the network device are described. Synchronization signal timeslot reselection may provide for downgrading a current stratum index to an artificial stratum index that does not accurately indicate a number of hops between the network device and a global synchronization source to allow for selection of available synchronization targets with stratum indices that are higher than or equal to the network device's stratum index without causing a synchronization loop. A synchronization signal pattern cycle structure having synchronization signal timeslots organized into multiple subcycles for accommodating synchronization signal timeslot reselection is utilized according to embodiments.
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2.
公开(公告)号:US20190098588A1
公开(公告)日:2019-03-28
申请号:US15718492
申请日:2017-09-28
Inventor: Wilson Wang Kit Thong , Victor Man Wai Kwan , Elaine Jihui Zhang , Jie Chuai , Ching Hong Leung , Yan Lam Lee , Eric Kong Chau Tsang
IPC: H04W56/00
Abstract: Methods and systems which provide for synchronization target selection by configuring a network device to reselect a synchronization signal transmission timeslot for synchronization target searching by the network device are described. Synchronization signal timeslot reselection may provide for downgrading a current stratum index to an artificial stratum index that does not accurately indicate a number of hops between the network device and a global synchronization source to allow for selection of available synchronization targets with stratum indices that are higher than or equal to the network device's stratum index without causing a synchronization loop. A synchronization signal pattern cycle structure having synchronization signal timeslots organized into multiple subcycles for accommodating synchronization signal timeslot reselection is utilized according to embodiments.
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