公开(公告)号：US20190096358A1

公开(公告)日：2019-03-28

申请号：US16083027

申请日：2016-03-08

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jing ZHAO ,  Bo YU

IPC: G09G5/00 ,  G09G5/377

Abstract: A display method and a terminal device are provided, so as to resolve a prior-art problem that CPU power consumption of the terminal device is relatively high because a display system of the terminal device processes three procedures in parallel in a Vsync period. The method is: determining, by the display system of the terminal device, a start moment of a first procedure in an (M+1)th Vsync period according to first processing duration of the first procedure in an Mth Vsync period, so that the display system starts to execute a device display procedure before starting to execute the first procedure, the display system delays executing the first procedure in the (M+1)th Vsync period, so that a time required for processing three procedures in parallel in the (M+1)th Vsync period by the display system is reduced, and CPU power consumption of the terminal device is reduced.

公开(公告)号：US20140064422A1

公开(公告)日：2014-03-06

申请号：US14013895

申请日：2013-08-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xuekun ZHANG ,  Jindi ZHANG ,  Bo YU ,  Faji YIN

IPC: H04L7/02

CPC classification number: H04L7/02 ,  H03L7/00 ,  H04L7/0083

Abstract: Embodiments of the present invention disclose a CDR circuit and a terminal, where the CDR circuit is configured to perform clock synchronization in a terminal with EEE function, and the CDR circuit includes: a phase detector, a first phase signal selector, a loop filter, a numerical controlled oscillator, a second phase signal selector, a phase signal generator, and a state machine. In the embodiments of the present invention, after the terminal enters a REFRESH state from a QUIET state, the CDR circuit can implement clock synchronization with a peer end without waiting for the loop filter and the numerical controlled oscillator to be converged, but the phase signal generator generates a phase signal satisfying a preset clock synchronization condition, and the second phase signal selector selects the phase signal satisfying the preset clock synchronization condition as the phase selection signal of the CDR.

Abstract translation: 本发明的实施例公开了CDR电路和终端，其中CDR电路被配置为在具有EEE功能的终端中执行时钟同步，并且CDR电路包括：相位检测器，第一相位信号选择器，环路滤波器， 数控振荡器，第二相位信号选择器，相位信号发生器和状态机。 在本发明的实施例中，在终端从QUIET状态进入REFRESH状态之后，CDR电路可以实现与对端的时钟同步，而不必等待环路滤波器并且数控振荡器被收敛，而相位信号 发生器产生满足预设时钟同步状态的相位信号，第二相位信号选择器选择满足预设时钟同步条件的相位信号作为CDR的相位选择信号。

公开(公告)号：US20200328674A1

公开(公告)日：2020-10-15

申请号：US16913219

申请日：2020-06-26

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Bo YU ,  Jinxiang ZHAN ,  Peiyong LI ,  Dianbo FU

IPC: H02M3/07 ,  H02M1/32

Abstract: A boost power conversion circuit includes an inductor, a first switch module, a second switch module, a first unilateral conduction component, a second unilateral conduction component, a flying capacitor, an upper bus capacitor, a lower bus capacitor, and a third unilateral conduction component. The power supply, the inductor, the first switch module, and the second switch module are connected in series to form a loop. The first unilateral conduction component, the second unilateral conduction component, the upper bus capacitor and the lower bus capacitor are connected in series. The flying capacitor is electrically connected between a reverse cut-off end of the first unilateral conduction component and a forward conduction end of the second unilateral conduction component. The third unilateral conduction component is configured to clamp a voltage stress of the second switch module to a lower-bus voltage.

公开(公告)号：US20170199642A1

公开(公告)日：2017-07-13

申请号：US15314260

申请日：2014-05-30

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Bo YU ,  Jianbin QIU

IPC: G06F3/0488 ,  G06F3/0484 ,  G06F3/0482

CPC classification number: G06F3/0488 ,  G06F3/0482 ,  G06F3/04845 ,  G06F3/04847 ,  G06F3/04883 ,  G06F3/147 ,  G09G2320/0252 ,  G09G2330/021

Abstract: A display method of a terminal device and a terminal device is provided. The display method of a terminal device includes: a framework layer sends a first touch point data; an application layer sends instruction information used to instruct to transfer slide drawing control rights to the framework layer and a generated display list to the framework layer after the application layer determines that the terminal device enters a sliding state according to acquired first touch point data; and the framework layer acquires second touch point data from a shared memory according to the instruction information, and draws an image according to the second touch point data and the display list. In this way, in an operation with repetitive image composition, the slide drawing control rights are transferred from an application module to a framework module, improving a response speed of a terminal system.