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    FAULT DETECTION OPTIMIZED ELECTRONIC CIRCUIT AND METHOD
    1.
    发明申请
    FAULT DETECTION OPTIMIZED ELECTRONIC CIRCUIT AND METHOD 有权
    故障检测优化电子电路及方法

    公开(公告)号：US20160219691A1

    公开(公告)日：2016-07-28

    申请号：US14602647

    申请日：2015-01-22

    申请人： HARRIS CORPORATION

    发明人： Justin Sitzman

    IPC分类号： H05K1/02 ,  H05K3/34 ,  G01R31/28 ,  H05K1/18

    CPC分类号： H05K1/0268 ,  G01R31/2884 ,  H01G4/30 ,  H01G4/40 ,  H01G13/00 ,  H05K3/3442 ,  H05K2201/10015 ,  H05K2203/162 ,  Y02P70/613

    摘要： Fault detection optimized electronic circuit includes a circuit substrate on which components of the electronic circuit are respectively disposed. Each of the components has a component body which includes at least a first and second contacts. A component trace formed of conductive material is disposed on a first exterior surface of each component body facing the substrate. The component trace is electrically insulated from the first and second contact. Each of the components contains a network consisting of at least two capacitors connected in series between the first and second contact. A test point is formed of conductive material disposed on a second exterior surface of each body. The test point is electrically isolated from the first and second contacts and electrically connected to at least the component trace.

    摘要翻译： 故障检测优化电子电路包括电路基板，电子电路的部件分别设置在该电路基板上。 每个部件具有至少包括第一和第二触点的部件主体。 由导电材料形成的部件迹线设置在面向基板的每个部件主体的第一外表面上。 元件迹线与第一和第二触点电绝缘。 每个组件包含由在第一和第二触点之间串联连接的至少两个电容器组成的网络。 测试点由设置在每个主体的第二外表面上的导电材料形成。 测试点与第一和第二触点电隔离，并电连接至至少部件迹线。