GRADIENT-FREE STRUCTURED PRUNING OF NEURAL NETWORKS

    公开(公告)号:US20240289619A1

    公开(公告)日:2024-08-29

    申请号:US18424595

    申请日:2024-01-26

    Applicant: Google LLC

    CPC classification number: G06N3/082 G06N3/048

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing a machine learning task on a network input to generate a network output. One of the methods includes: obtaining data specifying an initial neural network configured to perform a machine learning task; a representativeness measure for each of a plurality of filters; determining a central tendency measure for the plurality of filters based on processing a batch of network inputs using the initial neural network; determining a cumulative importance score for each of the plurality of filters; selecting a proper subset of the plurality of filters; and generating a pruned neural network configured to perform the machine learning task.

    ADAPTIVE TEST GENERATION FOR FUNCTIONAL COVERAGE CLOSURE

    公开(公告)号:US20250165689A1

    公开(公告)日:2025-05-22

    申请号:US18840532

    申请日:2023-02-28

    Applicant: Google LLC

    Abstract: Methods, systems, and apparatus for adaptively generating test stimuli for testing a hardware design for an integrated circuit. In one aspect, a system comprises one or more computers configured to obtain graph data representing a coverage dependency graph associated with a hardware design for an integrated circuit. At each of a plurality of simulation cycles, the one or more computers obtain a set of coverage statistics as of the simulation cycle and update respective distribution constraints for one or more random variables in a set of random variables using the coverage dependency graph and the coverage statistics. After the updating, the one or more computers generate one or more test stimuli by, for each test stimulus, sampling a respective value for each of the random variables based on the respective distribution constraints. The one or more computers simulate a performance of the integrated circuit for each of the test stimuli.

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