公开(公告)号：US07545658B2

公开(公告)日：2009-06-09

申请号：US11864332

申请日：2007-09-28

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H02M3/18

CPC分类号： H02M3/07

摘要： A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the charge pump to an input voltage terminal in a charge phase and to an output voltage terminal in a discharge phase. A controllable current source is connected in series with the charge pump in the discharge phase and an error amplifier has a first input connected to a reference voltage, a second input connected to the output voltage terminal and an output connected to a control input of the controllable current source. The converter further comprises a mode changeover circuit with a first comparator having a first input connected to the output of the error amplifier and a second input connected to a first threshold voltage source. A second comparator has a first input connected to the output of the error amplifier and a second input connected to a second threshold voltage source. A flip-flop has its set input connected to the output of the first comparator, its reset input connected to the output of the second comparator. The flip-flop has its output connected to the switch arrangement to switch the charge pump from doubler mode to tripler mode when the voltage at the output of the error amplifier exceeds the second threshold voltage and back to doubler mode when the output voltage at the error amplifier drops below the first threshold voltage.

摘要翻译： DC-DC升压转换器包括选择性地以倍压器或三阶模式工作的电荷泵。 开关装置将电荷泵连接到充电阶段的输入电压端子和放电阶段中的输出电压端子。 可控电流源在放电阶段与电荷泵串联连接，误差放大器具有连接到参考电压的第一输入端，连接到输出电压端子的第二输入端和连接到可控制电流源的控制输入端的输出端 当前来源。 转换器还包括模式切换电路，其中第一比较器具有连接到误差放大器的输出端的第一输入端和连接到第一阈值电压源的第二输入端。 第二比较器具有连接到误差放大器的输出端的第一输入端和连接到第二阈值电压源的第二输入端。 触发器的设置输入连接到第一比较器的输出，其复位输入连接到第二比较器的输出。 触发器的输出连接到开关装置，以便当误差放大器输出端的电压超过第二阈值电压时，将电荷泵从倍频模式切换到三倍模式，当误差输出电压达到倍频模式时 放大器低于第一阈值电压。

公开(公告)号：US20060033481A1

公开(公告)日：2006-02-16

申请号：US11199326

申请日：2005-08-08

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： G05F1/56

CPC分类号： G05F3/262 ,  H02M2001/0045

摘要： A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

摘要翻译： DC / DC转换器具有线性稳压器，以最小的效率损失减少或消除转换器的输出纹波。 转换器包括具有电源电压输入的转换器级，转换的电压输出和控制输入，具有连接到转换器级的转换的电压输出的输入的调节器级和连接到负载的输出，以及跟踪电路， 在转换器级的转换电压输出端的电压输入，调节器级的输出端的电压和负载感测电流，以及连接到转换器级的控制输入的输出。 跟踪电路控制转换器级，以便随着负载感测电流的增加而增加转换的电压，反之亦然。 转换器的输出电压总是足以消除纹波，而不必在其线性范围内操作稳压器的传输晶体管。

公开(公告)号：US20080111611A1

公开(公告)日：2008-05-15

申请号：US11939439

申请日：2007-11-13

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H03K17/687

CPC分类号： H03K17/687 ,  H03K17/04123 ,  H03K17/063 ,  H03K2217/0036

摘要： A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component. The resistance value of the second resistor is substantially smaller than the resistance value of the first resistor.

摘要翻译： CMOS技术中的功率开关电路具有功率MOS晶体管和驱动级。 功率MOS晶体管在比其最大允许栅极 - 源极电压更高的电源电压下工作; 并且电平移位器的驱动器级在基本上低于功率MOS晶体管的电源电压的较低电源电压下操作。 驱动器级包括串联在较高电源电压轨和参考电位轨之间的一对驱动器MOS晶体管，以及耦合到功率MOS晶体管的栅极的互连节点。 驱动器MOS晶体管的栅极被AC耦合以驱动相反相位的信号; 并且驱动器MOS晶体管的栅极通过与非线性分量串联连接的第一电阻器和第二电阻器的相应并联连接而连接到较高电压源轨。 第二电阻器的电阻值显着小于第一电阻器的电阻值。

公开(公告)号：US20080084720A1

公开(公告)日：2008-04-10

申请号：US11864332

申请日：2007-09-28

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H02M3/135 ,  H02M3/18

CPC分类号： H02M3/07

摘要： A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the charge pump to an input voltage terminal in a charge phase and to an output voltage terminal in a discharge phase. A controllable current source is connected in series with the charge pump in the discharge phase and an error amplifier has a first input connected to a reference voltage, a second input connected to the output voltage terminal and an output connected to a control input of the controllable current source. The converter further comprises a mode changeover circuit with a first comparator having a first input connected to the output of the error amplifier and a second input connected to a first threshold voltage source. A second comparator has a first input connected to the output of the error amplifier and a second input connected to a second threshold voltage source. A flip-flop has its set input connected to the output of the first comparator, its reset input connected to the output of the second comparator. The flip-flop has its output connected to the switch arrangement to switch the charge pump from doubler mode to tripler mode when the voltage at the output of the error amplifier exceeds the second threshold voltage and back to doubler mode when the output voltage at the error amplifier drops below the first threshold voltage.

摘要翻译： DC-DC升压转换器包括选择性地以倍压器或三阶模式工作的电荷泵。 开关装置将电荷泵连接到充电阶段的输入电压端子和放电阶段中的输出电压端子。 可控电流源在放电阶段与电荷泵串联连接，误差放大器具有连接到参考电压的第一输入端，连接到输出电压端子的第二输入端和连接到可控制电流源的控制输入端的输出端 当前来源。 转换器还包括模式切换电路，其中第一比较器具有连接到误差放大器的输出端的第一输入端和连接到第一阈值电压源的第二输入端。 第二比较器具有连接到误差放大器的输出端的第一输入端和连接到第二阈值电压源的第二输入端。 触发器的设置输入连接到第一比较器的输出，其复位输入连接到第二比较器的输出。 触发器的输出连接到开关装置，以便当误差放大器输出端的电压超过第二阈值电压时，将电荷泵从倍频模式切换到三倍模式，当误差输出电压达到倍频模式时 放大器低于第一阈值电压。

公开(公告)号：US07659754B2

公开(公告)日：2010-02-09

申请号：US11939439

申请日：2007-11-13

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H03B1/00 ,  H03K3/00

CPC分类号： H03K17/687 ,  H03K17/04123 ,  H03K17/063 ,  H03K2217/0036

摘要： A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component. The resistance value of the second resistor is substantially smaller than the resistance value of the first resistor.

摘要翻译： CMOS技术中的功率开关电路具有功率MOS晶体管和驱动级。 功率MOS晶体管在比其最大允许栅极 - 源极电压更高的电源电压下工作; 并且电平移位器的驱动器级在基本上低于功率MOS晶体管的电源电压的较低电源电压下操作。 驱动器级包括串联在较高电源电压轨和参考电位轨之间的一对驱动器MOS晶体管，以及耦合到功率MOS晶体管的栅极的互连节点。 驱动器MOS晶体管的栅极被AC耦合以驱动相反相位的信号; 并且驱动器MOS晶体管的栅极通过与非线性分量串联连接的第一电阻器和第二电阻器的相应并联连接而连接到较高电压源轨。 第二电阻器的电阻值显着小于第一电阻器的电阻值。

公开(公告)号：US07282895B2

公开(公告)日：2007-10-16

申请号：US11199326

申请日：2005-08-08

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： G05F1/00 ,  G05F1/613

CPC分类号： G05F3/262 ,  H02M2001/0045

摘要： A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

摘要翻译： DC / DC转换器具有线性稳压器，以最小的效率损失减少或消除转换器的输出纹波。 转换器包括具有电源电压输入的转换器级，转换的电压输出和控制输入，具有连接到转换器级的转换的电压输出的输入的调节器级和连接到负载的输出，以及跟踪电路， 在转换器级的转换电压输出端的电压输入，调节器级的输出端的电压和负载感测电流，以及连接到转换器级的控制输入的输出。 跟踪电路控制转换器级，以便随着负载感测电流的增加而增加转换的电压，反之亦然。 转换器的输出电压总是足以消除纹波，而不必在其线性范围内操作稳压器的传输晶体管。

公开(公告)号：US20110204860A1

公开(公告)日：2011-08-25

申请号：US13028034

申请日：2011-02-15

申请人： Gerhard Thiele ,  Konrad Wagensohner ,  Josy Bernard

发明人： Gerhard Thiele ,  Konrad Wagensohner ,  Josy Bernard

IPC分类号： G05F1/10

CPC分类号： H02M3/156 ,  H02M2001/0009

摘要： A DC-DC converter has high-side power and low-side power transistors connected in series between supply terminals, an inductor connected between the power transistors and an output terminal. A comparator compares the output voltage with a reference voltage. A detector detects when inductor current approaches zero. A timer is configured to determine a minimum ON time of the high-side power transistor optimized for a particular value inductor. A current detector detects current flow in the back-gate diode of the low-side power transistor. timer is configured to determine an overriding ON time in response to the back-gate current detector. Logic provides control signals to gate power transistors in response to the comparator and the longer one of the minimum ON time and the overriding ON time. The minimum ON time for the high-side power transistor is adjusted in response to the actual inductance of the inductor.

摘要翻译： DC-DC转换器具有串联连接在电源端子之间的高侧功率和低侧功率晶体管，连接在功率晶体管和输出端子之间的电感器。 比较器将输出电压与参考电压进行比较。 检测器检测电感电流何时接近零。 定时器被配置为确定针对特定值电感器优化的高侧功率晶体管的最小导通时间。 电流检测器检测低边功率晶体管的背栅极二极管中的电流。 定时器被配置为响应于背栅极电流检测器确定覆盖ON时间。 逻辑提供响应于比较器的栅极功率晶体管的控制信号和最小导通时间和覆盖导通时间中较长的一个。 响应于电感器的实际电感，调整高侧功率晶体管的最小导通时间。

公开(公告)号：US20050180236A1

公开(公告)日：2005-08-18

申请号：US11053318

申请日：2005-02-07

申请人： Gerhard Thiele ,  Kevin Scoones ,  Thomas Keller ,  Franz Prexl

发明人： Gerhard Thiele ,  Kevin Scoones ,  Thomas Keller ,  Franz Prexl

IPC分类号： G05F3/28 ,  G11C7/00 ,  H02M1/36 ,  H02M3/156 ,  H03K17/08 ,  H03K17/082

CPC分类号： H02M1/36 ,  H03K17/0822 ,  H03K2017/0806

摘要： An integrated circuit including a precharge circuit for a DC/DC boost converter is disclosed with an inductor (L1), a power MOSFET transistor (MP5) connected in series with the inductor between a supply terminal and a load (Rload, Cload) that has a second end connected to ground. This precharge circuit further includes a reference current circuit with a MOSFET transistor (MP4) that has a gate connected with the gate of the power MOSFET transistor (MP5) to form a current mirror. The precharge circuit works to approach the output voltage to the supply voltage prior to the converter startup. An included regulation circuit adjusts the gate potential at the power MOSFET transistor (MP5) and at the MOSFET transistor (MP4) in the reference circuit in response to a reduction of the drain-source voltage of the power MOSFET transistor (MP5), in a sense to keep the precharge current through the power MOSFET transistor (MP5) constant.

摘要翻译： 公开了一种包括用于DC / DC升压转换器的预充电电路的集成电路，电感器（L 1），在电源端子和负载（Rload，Cload）之间与电感器串联连接的功率MOSFET晶体管（MP 5） 其具有连接到地面的第二端。 该预充电电路还包括具有MOSFET晶体管（MP4）的参考电流电路，其具有与功率MOSFET晶体管（MP 5）的栅极连接的栅极，以形成电流镜。 在转换器启动之前，预充电电路用于接近输出电压至电源电压。 包括的调节电路响应于功率MOSFET晶体管（MP 5）的漏极 - 源极电压的降低来调整参考电路中的功率MOSFET晶体管（MP 5）和MOSFET晶体管（MP 4）处的栅极电位， 在某种意义上，通过功率MOSFET晶体管（MP 5）保持预充电电流恒定。

公开(公告)号：US20100308784A1

公开(公告)日：2010-12-09

申请号：US12792919

申请日：2010-06-03

申请人： Kevin Scoones ,  Gerhard Thiele ,  Neil Gibson

发明人： Kevin Scoones ,  Gerhard Thiele ,  Neil Gibson

IPC分类号： G05F1/10

CPC分类号： H02M3/157 ,  H02M1/32 ,  H02M3/1588 ,  H02M2001/0032 ,  Y02B70/1466

摘要： The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.

摘要翻译： 本发明涉及使用比较器产生用于驱动开关模式DC-DC转换器的电源开关的输出信号的DC-DC转换的电子装置和方法。 电子设备被配置为响应于负载的减小而以比第一斜率减小比较器的偏置电流，并且响应于增加的负载而以比第二斜率增加比较器的偏置电流，其中第二斜率比 第一个斜坡

公开(公告)号：US06603295B2

公开(公告)日：2003-08-05

申请号：US10051239

申请日：2002-01-18

申请人： Stefan Reithmaier ,  Gerhard Thiele

发明人： Stefan Reithmaier ,  Gerhard Thiele

IPC分类号： G05F316

CPC分类号： G05F1/565

摘要： The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source (12) and a storage capacitor (C2) to which a voltage provided by a reference voltage source (12) can be applied via a controllable switch. The charging voltage of this storage capacitor (C1) is the reference voltage to be generated. The controllable switch (P1) is a MOS field-effect transistor with back gate (24) which, by means of a refresh signal supplied by a control circuit (22), can be put periodically into either a conducting or a non-conducting state. The back gate (24) of the MOS fieldeffect transistor (P1) is connected to an auxiliary storage capacitor (C2) to which the voltage supplied by the reference voltage source (12) can be applied via a further switch, consisting of a MOS field-effect transistor (P2) with back gate (26), and which is also controlled by the refresh signal. The back gate (26) of the further MOS field-effect transistor (P2) is connected to a fixed voltage, which is greater than the voltage supplied by the reference voltage source (12).