APPARATUS AND METHOD FOR REDUCING PEAK POWER USING ASYNCHRONOUS CIRCUIT DESIGN TECHNOLOGY
    1.
    发明申请
    APPARATUS AND METHOD FOR REDUCING PEAK POWER USING ASYNCHRONOUS CIRCUIT DESIGN TECHNOLOGY 审中-公开
    使用异步电路设计技术降低峰值功率的装置和方法

    公开(公告)号:US20130326454A1

    公开(公告)日:2013-12-05

    申请号:US13835875

    申请日:2013-03-15

    CPC classification number: G06F17/5072 G06F17/505 G06F2217/78

    Abstract: Disclosed herein are an apparatus and method for reducing peak power using an asynchronous circuit design technology. The apparatus includes a combinational circuit unit and an asynchronous control circuit unit. The combinational circuit unit divides a combinational circuit into a plurality of partial circuits based on the depth of input and output. The asynchronous control circuit unit controls the combinational circuit so that the switching operations of the partial circuits are performed in an asynchronous manner according to temporal order and so that a switching operation is not performed in other partial circuits when a switching operation is performed in a partial circuit.

    Abstract translation: 本文公开了一种使用异步电路设计技术降低峰值功率的装置和方法。 该装置包括组合电路单元和异步控制电路单元。 组合电路单元基于输入和输出的深度将组合电路分成多个部分电路。 异步控制电路单元控制组合电路,使得部分电路的切换操作根据时间顺序以异步方式执行,并且当在部分电路中执行切换操作时,不在其它部分电路中执行切换操作 电路。

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