GENERATING DOWNLINK FRAME AND SEARCHING FOR CELL

    公开(公告)号:US20220407594A1

    公开(公告)日:2022-12-22

    申请号:US17892024

    申请日:2022-08-19

    Abstract: The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.

    SIGNAL PROCESSING APPARATUS AND METHOD
    4.
    发明申请
    SIGNAL PROCESSING APPARATUS AND METHOD 审中-公开
    信号处理装置和方法

    公开(公告)号:US20150341134A1

    公开(公告)日:2015-11-26

    申请号:US14665295

    申请日:2015-03-23

    Abstract: An exemplary embodiment of the present invention provides a method for a communication apparatus to process a signal. A first processor of the communication apparatus performs symbol mapping on a first baseband signal transmitted via a PDSCH (physical downlink shared channel). The first processor sends the mapped first baseband signal to a second processor of the communication apparatus by interfacing with the second processor. The second processor modulates the sent first baseband signal. The second processor converts the modulated first baseband signal into an intermediate frequency signal.

    Abstract translation: 本发明的示例性实施例提供了一种用于处理信号的通信装置的方法。 通信装置的第一处理器对经由PDSCH(物理下行链路共享信道)发送的第一基带信号执行符号映射。 第一处理器通过与第二处理器接口将映射的第一基带信号发送到通信设备的第二处理器。 第二处理器调制发送的第一基带信号。 第二处理器将调制的第一基带信号转换成中频信号。

    GENERATING DOWNLINK FRAME AND SEARCHING FOR CELL
    5.
    发明申请
    GENERATING DOWNLINK FRAME AND SEARCHING FOR CELL 有权
    生成下载框架并搜索单元格

    公开(公告)号:US20150230219A1

    公开(公告)日:2015-08-13

    申请号:US14697146

    申请日:2015-04-27

    Abstract: The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.

    Abstract translation: 本申请涉及生成下行链路帧的方法。 产生下行链路帧的方法包括:产生指示小区组信息的第一短序列和第二短序列; 产生由所述主同步信号确定的第一加扰序列和第二加扰序列; 产生由第一短序列确定的第三加扰序列和由第二短序列确定的第四加扰序列; 用相应的加扰序列对该短序列进行加扰; 以及映射包括与第一加扰序列加扰的第一短序列的第二同步信号,用第二加扰序列和第三加扰序列加扰的第二短序列,用第一加扰序列和第一短序列加扰的第二短序列 通过第二加扰序列和第四加扰序列加扰到频域。

    GENERATING DOWNLINK FRAME AND SEARCHING FOR CELL

    公开(公告)号:US20190357127A1

    公开(公告)日:2019-11-21

    申请号:US16530994

    申请日:2019-08-02

    Abstract: The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.

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