公开(公告)号：US20180121660A1

公开(公告)日：2018-05-03

申请号：US15799807

申请日：2017-10-31

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Byeong-Cheol CHOI ,  Jong-Seop PARK ,  Jung-Chan NA ,  Seung-Hun JIN

IPC: G06F21/57

CPC classification number: G06F21/577 ,  G06F2221/034

Abstract: Disclosed herein are an apparatus and method for dynamic binary analysis on a hardware board. The method for dynamic binary analysis on a hardware board is performed using an apparatus for dynamic binary analysis on the hardware board, and includes generating information required for dynamic binary analysis based on information collected while interfacing with an embedded device, disassembling, by a software processing unit, the information required for dynamic binary analysis by receiving the information from a hardware processing unit while interfacing with the hardware processing unit, selecting a core platform of the embedded device based on results of the disassembly, and analyzing security vulnerabilities in the embedded device by performing dynamic binary analysis of the core platform.