Integrated circuit shield
    1.
    发明授权

    公开(公告)号:US11329010B2

    公开(公告)日:2022-05-10

    申请号:US16838577

    申请日:2020-04-02

    IPC分类号: H01L23/00

    摘要: An anti-tamper layer is applied to a blank wafer. The layered wafer is then diced into shield dies. A shield die is oxide-to-oxide bonded to the top of an active die such that removing the shield die will damage the active die. The shield die may be sized and positioned such that wirebond pads along one or more edges of the active die remain exposed. The exposed wirebond pads may be used to electrically connect, via wirebonds, the active die to a substrate. A second shield die may be attached to the bottom of the active die to help protect against the use of bottom-to-top delayering.

    PACKAGING TECHNIQUES FOR BACKSIDE MESH CONNECTIVITY

    公开(公告)号:US20230137364A1

    公开(公告)日:2023-05-04

    申请号:US17984155

    申请日:2022-11-09

    发明人: Scott C. Best Ming Li

    IPC分类号: H01L23/00 G06F21/87 H04L9/08

    摘要: The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.

    Packaging techniques for backside mesh connectivity

    公开(公告)号:US11502047B2

    公开(公告)日:2022-11-15

    申请号:US16645353

    申请日:2018-09-07

    发明人: Scott C. Best Ming Li

    IPC分类号: H01L23/00 G06F21/87 H04L9/08

    摘要: The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.

    PACKAGING TECHNIQUES FOR BACKSIDE MESH CONNECTIVITY

    公开(公告)号:US20210035924A1

    公开(公告)日:2021-02-04

    申请号:US16645353

    申请日:2018-09-07

    发明人: Scott C. Best Ming Li

    IPC分类号: H01L23/00 H04L9/08 G06F21/87

    摘要: The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.