公开(公告)号：US20110090740A1

公开(公告)日：2011-04-21

申请号：US12821341

申请日：2010-06-23

Applicant: Chul Ho LEE ,  Seok Cheon KWON

Inventor： Chul Ho LEE ,  Seok Cheon KWON

IPC: G11C16/04

CPC classification number: G11C16/26 ,  G11C16/10

Abstract: A flash memory device comprises alternately arranged odd and even memory cells. The odd and even memory cells are connected to corresponding odd and even bitlines, which are connected to corresponding odd and even page buffers. In a read operation of the flash memory device, data is sensed at two different times via the odd and even bitlines. In certain embodiments, data is read from the odd page buffers while data is being sensed via the even bit lines, or vice versa.

Abstract translation: 闪存器件包括交替布置的奇数和偶数存储器单元。 奇数和偶数存储单元连接到相应的奇数和偶数位线，连接到相应的奇数和偶数页缓冲器。 在闪速存储器件的读取操作中，通过奇数位和偶数位线在两个不同的时间检测数据。 在某些实施例中，从奇数页缓冲器读取数据，而数据正通过偶数位线检测，反之亦然。