BICMOS CURRENT REFERENCE CIRCUIT
    1.
    发明申请
    BICMOS CURRENT REFERENCE CIRCUIT 审中-公开
    BICMOS电流参考电路

    公开(公告)号:US20140152348A1

    公开(公告)日:2014-06-05

    申请号:US14115630

    申请日:2012-09-27

    IPC分类号: H03K3/01

    CPC分类号: H03K3/01 G05F3/30

    摘要: A BiCMOS current reference circuit includes a reference core, a startup circuit, and a reference current output circuit. The reference core contains a current mirror, a positive temperature coefficient current generator, and a negative temperature coefficient current generator. The current mirror generates matching branch current. The positive and negative temperature coefficient currents were added in certain proportion to generate a reference current with zero temperature coefficient at room temperature. The startup circuit starts the reference core at power-on. The reference current output circuit proportionably outputs reference current generated by the reference core. Compared with the conventional voltage reference, the circuit uses current conveying technique, so it won't be affected by DC voltage drops of power supply network, and it features low transmission loss, good matching, excellent temperature stability, small chip size and auto-startup at power-on. It's preferably suitable for applications where A/D and D/A converters require accurate reference signals.

    摘要翻译: BiCMOS电流参考电路包括参考磁芯,启动电路和参考电流输出电路。 参考磁芯包含电流镜,正温度系数电流发生器和负温度系数电流发生器。 当前镜像生成匹配分支电流。 以一定比例加入正温度系数和负温度系数电流,以产生室温下零温度系数的参考电流。 启动电路在上电时启动参考内核。 参考电流输出电路按比例输出由参考磁芯产生的参考电流。 与常规电压基准相比,电路采用电流传输技术,不受电网直流电压下降的影响,传输损耗低,匹配匹配好,温度稳定性好,芯片尺寸小, 开机启动 它优选适用于A / D和D / A转换器需要精确参考信号的应用。

    Band-gap reference circuit based on temperature compensation
    2.
    发明授权
    Band-gap reference circuit based on temperature compensation 有权
    基于温度补偿的带隙基准电路

    公开(公告)号:US09588539B2

    公开(公告)日:2017-03-07

    申请号:US14785349

    申请日:2014-04-02

    IPC分类号: G05F3/24 G05F3/30 G05F3/26

    CPC分类号: G05F3/242 G05F3/262 G05F3/30

    摘要: A band-gap reference circuit includes a proportioned current generating circuit, a startup circuit, a current mirror circuit, a high-order temperature compensation generating circuit and a reference generating circuit. The proportioned current generating circuit is configured to generate a current in direct proportion to the absolute temperature. The startup circuit is configured to start up the proportioned current generating circuit when the startup circuit is power on. The current mirror circuit is configured to reproduce a current which is the same as the current in direct proportion to the absolute temperature. The high-order temperature compensation generating circuit is configured to generate a compensation current of high-order temperature coefficient. The reference generating circuit is configured to add the voltage which is generated by the proportioned current generating circuit to a voltage of negative temperature coefficient according to a certain proportion, and output a reference voltage of zero temperature coefficient.

    摘要翻译: 带隙基准电路包括比例电流产生电路,启动电路,电流镜电路,高阶温度补偿发生电路和基准发生电路。 成比例的电流产生电路被配置为产生与绝对温度成正比的电流。 启动电路被配置为在启动电路接通电源时启动成比例的电流产生电路。 电流镜电路被配置为再现与绝对温度成正比的电流相同的电流。 高阶温度补偿发生电路被配置为产生高阶温度系数的补偿电流。 参考产生电路被配置为根据一定比例将由比例电流产生电路产生的电压加到负温度系数的电压,并输出零温度系数的参考电压。

    Comparator offset voltage self-correction circuit

    公开(公告)号:US10735008B2

    公开(公告)日:2020-08-04

    申请号:US16476106

    申请日:2016-06-27

    IPC分类号: H03M1/06 H03K5/24

    摘要: A comparator offset voltage self-correction circuit is disclosed. A comparator offset voltage which is caused by the semiconductor process parameter randomness also has randomness. Due to the randomness of the comparator offset voltage, a reference voltage of a parallel comparator in a parallel-conversion-type analog-to-digital converter is uncertain. If the comparator offset voltage is large, the parallel-conversion-type analog-to-digital converter may even have a functional error. The comparator offset voltage self-correction circuit provided in the present invention can correct a random offset voltage of a comparator to meet requirements. Therefore, by means of the circuit and a method provided in the present invention, adverse influence of the random offset of the comparator on the function and the performance of the parallel-conversion-type analog-to-digital converter is eliminated, thereby greatly improving the speed and the performance of the analog-to-digital converter, in particular the parallel-conversion-type analog-to-digital converter.

    Track and hold circuit
    4.
    发明授权

    公开(公告)号:US10128830B2

    公开(公告)日:2018-11-13

    申请号:US15318975

    申请日:2014-04-17

    IPC分类号: G11C27/02 H03K17/082

    摘要: A track and hold circuit comprises an input buffer amplifier, a unit gain amplifier module, a sampling switch, a drive triode and a sampling capacitor. The input buffer amplifier receives an input signal. In a track phase, the sampling switch is electrically connected to an emitter electrode of the drive triode; the input signal charges the sampling capacitor after being buffered by the input buffer amplifier, amplified without distortion by the unit gain amplifier module and driven by the drive triode. In a hold phase, the sampling switch is electrically connected to a base electrode of the drive triode; the base voltage of the drive triode is pulled down until the drive triode is cut off; electrical charges on the sampling capacitor are thereby held, causing the signal to be held on the sampling capacitor.