Abstract:
A method and apparatus embodying some aspects of a packet processing communication system. The packet processing communication apparatus comprises a packet processor and a microprocessor. The packet processor is configured to process packets belonging to a certain flow through a plurality of processing stages of a programmable data-path. The microprocessor is in communication with the packet processor and is configured to process a user-defined function in the programmable data-path on designated packets belonging to the certain flow. The packets of respective flows to be processed by the microprocessor are designated in a mapping. The designated packets processed by the microprocessor are returned to one of the processing stages of the packet processor for further processing.
Abstract:
The present disclosure is directed to a network processor for processing high volumes of traffic provided by todays access networks at (or near) wireline speeds. The network process can be implemented within a residential gateway to perform, among other functions, routing to deliver high speed data services (e.g., data services with rates up to 10 Gbit/s) from a wide area network (WAN) to end user devices in a local area network (LAN).