公开(公告)号：US08495536B2

公开(公告)日：2013-07-23

申请号：US13444094

申请日：2012-04-11

申请人： Bo Fan ,  Liang Chen ,  Yongfeng Pan ,  Fan Zhou

发明人： Bo Fan ,  Liang Chen ,  Yongfeng Pan ,  Fan Zhou

IPC分类号： G06F17/50

CPC分类号： G06F17/5022

摘要： Embodiments of the present invention provide a method of computing validation coverage of an integrated circuit model, comprising: obtaining a logical structure of a integrated circuit model under validation; searching and recording signal paths in the integrated circuit model under validation based on the logical structure; and computing coverage of validation with respect to the signal paths. According to the technical solution as provided in the embodiments of the present invention, a signal path-based validation coverage may be obtained, thereby providing data regarding validation completeness more accurately.

摘要翻译： 本发明的实施例提供了一种计算集成电路模型的验证覆盖的方法，包括：获得验证下的集成电路模型的逻辑结构; 在逻辑结构验证的基础上，在集成电路模型中搜索和记录信号路径; 以及计算关于信号路径的验证的覆盖。 根据本发明实施例提供的技术方案，可以获得基于信号路径的验证覆盖，从而更准确地提供关于验证完整性的数据。

公开(公告)号：US20130055179A1

公开(公告)日：2013-02-28

申请号：US13444094

申请日：2012-04-11

申请人： Bo Fan ,  Liang Chen ,  Yongfeng Pan ,  Fan S.H. Zhou

发明人： Bo Fan ,  Liang Chen ,  Yongfeng Pan ,  Fan S.H. Zhou

IPC分类号： G06F17/50

CPC分类号： G06F17/5022

摘要： Embodiments of the present invention provide a method of computing validation coverage of an integrated circuit model, comprising: obtaining a logical structure of a integrated circuit model under validation; searching and recording signal paths in the integrated circuit model under validation based on the logical structure; and computing coverage of validation with respect to the signal paths. According to the technical solution as provided in the embodiments of the present invention, a signal path-based validation coverage may be obtained, thereby providing data regarding validation completeness more accurately.

摘要翻译： 本发明的实施例提供了一种计算集成电路模型的验证覆盖的方法，包括：获得验证下的集成电路模型的逻辑结构; 在逻辑结构验证的基础上，在集成电路模型中搜索和记录信号路径; 以及计算关于信号路径的验证的覆盖。 根据本发明实施例提供的技术方案，可以获得基于信号路径的验证覆盖，从而更准确地提供关于验证完整性的数据。