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公开(公告)号：US20250021230A1
公开(公告)日：2025-01-16
申请号：US18350145
申请日：2023-07-11
Applicant: Bar-Ilan University
Inventor： Adam Teman , Hanan Marinberg , Tzachi Noy
IPC: G06F3/06
Abstract: A method for using a storage array of a circuit includes generating a netlist of components and connections of circuitry of a storage array using behavioral description and random logic synthesis, using a write port to clock-gate each register of the storage array, and multiplexing data based on a selected word line of the storage array.
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