公开(公告)号：US08970414B2

公开(公告)日：2015-03-03

申请号：US13931498

申请日：2013-06-28

Applicant: Broadcom Corporation

Inventor： David Stoops ,  Min Gyu Kim ,  Vinod Jayakumar

IPC: H03M3/00

CPC classification number: H03M3/50 ,  H03M3/502

Abstract: Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal.

公开(公告)号：US08952837B2

公开(公告)日：2015-02-10

申请号：US14019246

申请日：2013-09-05

Applicant: Broadcom Corporation

Inventor： Min Gyu Kim ,  Dongtian Lu ,  Todd L. Brooks

IPC: H03M3/02 ,  H03M3/00

CPC classification number: H03M3/414 ,  H03M3/32 ,  H03M3/50 ,  H03M7/3022

Abstract: A multi-rate sigma delta digital-to-analog converter may include a signal input and a signal output, and multiple modulators. A first of the modulator may convert a digital input signal on the signal input to an analog output signal on the signal output. Subsequent of the multiple modulators may shape and cancel quantization noise received from a proceeding modulator. One of the modulators may operate at a higher frequency than does another of the multiple modulation loops.

Abstract translation: 多速率Σ-Δ数模转换器可以包括信号输入和信号输出以及多个调制器。 调制器中的第一个可以将信号输入上的数字输入信号转换为信号输出上的模拟输出信号。 随后的多个调制器可以形成和消除从前进的调制器接收的量化噪声。 调制器中的一个可以以比多个调制回路中的另一个更高的频率工作。

公开(公告)号：US20140375488A1

公开(公告)日：2014-12-25

申请号：US13931498

申请日：2013-06-28

Applicant: Broadcom Corporation

Inventor： David Stoops ,  Min Gyu Kim ,  Vinod Jayakumar

IPC: H03M3/00

CPC classification number: H03M3/50 ,  H03M3/502

Abstract: Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal.

Abstract translation: 公开了用于将数字输入信号转换为模拟输出信号的方法，系统和装置。 第一Δ-Σ调制器接收共模参考信号并产生共模控制信号。 数据Δ-Σ调制器接收数字输入信号并产生调制数字输入信号。 洗牌器接收调制数字输入信号和共模控制信号，并产生混洗数字输入信号。 数模转换器（DAC）具有多个三电平单元DAC元件，每个三电平单元DAC元件接收混频数字输入信号的相应部分作为第一输入信号，并且接收第二和第三输入信号。 三电平单元DAC元件具有耦合在一起的第一输出产生第一输出信号和耦合在一起的第二输出产生第二输出信号。 运算放大器接收第一和第二输出信号并产生模拟输出信号。

公开(公告)号：US09172393B2

公开(公告)日：2015-10-27

申请号：US14633888

申请日：2015-02-27

Applicant: Broadcom Corporation

Inventor： David Stoops ,  Min Gyu Kim ,  Vinod Jayakumar

IPC: H03M3/00

CPC classification number: H03M3/50 ,  H03M3/502

Abstract: Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal.

Abstract translation: 公开了用于将数字输入信号转换为模拟输出信号的方法，系统和装置。 第一Δ-Σ调制器接收共模参考信号并产生共模控制信号。 数据Δ-Σ调制器接收数字输入信号并产生调制数字输入信号。 洗牌器接收调制数字输入信号和共模控制信号，并产生混洗数字输入信号。 数模转换器（DAC）具有多个三电平单元DAC元件，每个三电平单元DAC元件接收混频数字输入信号的相应部分作为第一输入信号，并接收第二和第三输入信号。 三电平单元DAC元件具有耦合在一起的第一输出产生第一输出信号和耦合在一起的第二输出产生第二输出信号。 运算放大器接收第一和第二输出信号并产生模拟输出信号。

公开(公告)号：US20150066438A1

公开(公告)日：2015-03-05

申请号：US14473635

申请日：2014-08-29

Applicant: BROADCOM CORPORATION

Inventor： Todd Lee Brooks ,  Xicheng Jiang ,  Iuri Mehr ,  David Joseph Stoops ,  Vinod Jayakumar ,  Min Gyu Kim ,  Hui Zheng ,  I-Ning Ku ,  Vinay Chandrasekhar ,  Yee Ling Cheung

IPC: H03B5/04 ,  G01R19/00 ,  G01K1/00 ,  G01L7/00 ,  A61B5/021 ,  H05B33/08 ,  A61B5/01 ,  A61B5/024 ,  A61B5/08 ,  G01J1/00 ,  G01N33/00

CPC classification number: H05B33/089 ,  A61B5/01 ,  A61B5/021 ,  A61B5/024 ,  A61B5/0816 ,  A61B2562/06 ,  G01J1/44 ,  G01K1/02 ,  G01R19/0092 ,  H03K3/0231

Abstract: A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and/or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). In desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.

Abstract translation: 传感器接口包括片上弛豫振荡器电路和PLL，其协作地工作以使用低功率元件在片上产生高精度的时钟信号。 光电二极管基于表示传感器信号的光信号产生电流信号。 基于高度精确的时钟信号操作的ADC基于由光电二极管产生的电流信号产生数字信号，并且处理器处理数字信号以估计传感器信号内的传感器数据。 可以感测的特征的实例可以包括环境特征（例如，温度，湿度，大气压力等）和/或生物医学特征（例如体温，心率，呼吸频率，血压等）。 在期望的情况下，放大器在将其提供给ADC之前处理提供的光电二极管的电流信号。 而且，可以使用产生反馈电流的一个或多个CDAC来降低传感器接口的噪声灵敏度。

公开(公告)号：US20140240154A1

公开(公告)日：2014-08-28

申请号：US14019246

申请日：2013-09-05

Applicant: Broadcom Corporation

Inventor： Min Gyu Kim ,  Dongtian Lu ,  Todd L. Brooks

IPC: H03M3/00

CPC classification number: H03M3/414 ,  H03M3/32 ,  H03M3/50 ,  H03M7/3022

Abstract: A multi-rate sigma delta digital-to-analog converter may include a signal input and a signal output, and multiple modulators. A first of the modulator may convert a digital input signal on the signal input to an analog output signal on the signal output. Subsequent of the multiple modulators may shape and cancel quantization noise received from a proceeding modulator. One of the modulators may operate at a higher frequency than does another of the multiple modulation loops.

Abstract translation: 多速率Σ-Δ数模转换器可以包括信号输入和信号输出以及多个调制器。 调制器中的第一个可以将信号输入上的数字输入信号转换为信号输出上的模拟输出信号。 随后的多个调制器可以形成和消除从前进的调制器接收的量化噪声。 调制器中的一个可以以比多个调制回路中的另一个更高的频率工作。

公开(公告)号：US09756699B2

公开(公告)日：2017-09-05

申请号：US14473635

申请日：2014-08-29

Applicant: BROADCOM CORPORATION

Inventor： Todd Lee Brooks ,  Xicheng Jiang ,  Iuri Mehr ,  David Joseph Stoops ,  Vinod Jayakumar ,  Min Gyu Kim ,  Hui Zheng ,  I-Ning Ku ,  Vinay Chandrasekhar ,  Yee Ling Cheung

IPC: H04B15/00 ,  H05B33/08 ,  G01R19/00 ,  H03K3/0231 ,  G01K1/02 ,  A61B5/01 ,  A61B5/024 ,  A61B5/08 ,  A61B5/021 ,  G01J1/44

CPC classification number: H05B33/089 ,  A61B5/01 ,  A61B5/021 ,  A61B5/024 ,  A61B5/0816 ,  A61B2562/06 ,  G01J1/44 ,  G01K1/02 ,  G01R19/0092 ,  H03K3/0231

Abstract: A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and/or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). If desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.

公开(公告)号：US20150171891A1

公开(公告)日：2015-06-18

申请号：US14633888

申请日：2015-02-27

Applicant: Broadcom Corporation

Inventor： David Stoops ,  Min Gyu Kim ,  Vinod Jayakumar

IPC: H03M3/00

CPC classification number: H03M3/50 ,  H03M3/502

Abstract: Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal.

Abstract translation: 公开了用于将数字输入信号转换为模拟输出信号的方法，系统和装置。 第一Δ-Σ调制器接收共模参考信号并产生共模控制信号。 数据Δ-Σ调制器接收数字输入信号并产生调制数字输入信号。 洗牌器接收调制数字输入信号和共模控制信号，并产生混洗数字输入信号。 数模转换器（DAC）具有多个三电平单元DAC元件，每个三电平单元DAC元件接收混频数字输入信号的相应部分作为第一输入信号，并且接收第二和第三输入信号。 三电平单元DAC元件具有耦合在一起的第一输出产生第一输出信号和耦合在一起的第二输出产生第二输出信号。 运算放大器接收第一和第二输出信号并产生模拟输出信号。