公开(公告)号：US20210167156A1

公开(公告)日：2021-06-03

申请号：US16066205

申请日：2017-12-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xuefei SUN ,  Zhengliang LI ,  Bin ZHANG ,  Yu-Cheng CHAN ,  Chien Hung LIU

IPC: H01L27/32 ,  H01L29/786

Abstract: A display substrate and a manufacture method thereof, a display device are disclosed. The display substrate includes a base substrate, a thin film transistor on the base substrate and a light shielding layer on the base substrate. The light shielding layer includes a first light shielding layer and a second light shielding layer that are stacked; an orthographic projection of an active layer of the thin film transistor on the base substrate is within an orthogonal projection of the light shielding layer on the base substrate, and the second light shielding layer includes nanoparticles capable of absorbing light in a specific wavelength range.

公开(公告)号：US20170018652A1

公开(公告)日：2017-01-19

申请号：US15122066

申请日：2016-02-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zheng LIU ,  Xiaoyong LU ,  Xiaolong LI ,  Yu-Cheng CHAN

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78621 ,  H01L27/02 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66757 ,  H01L29/786 ,  H01L29/78645 ,  H01L29/78675 ,  H01L29/78696

Abstract: A method for fabricating a Polysilicon Thin-Film Transistor is provided. The method includes forming a polysilicon active layer, forming a first gate insulation layer and a first gate electrode sequentially on the active layer, conducting a first ion implantation process on the active layer by using the first gate electrode as a mask to form two doped regions at ends of the active layer, forming a second gate insulation layer and a second gate electrode sequentially on the first gate insulation layer and the first gate electrode, and conducting a second ion implantation process on the active layer by using the second gate electrode as another mask to form two source/drain implantation regions at two outer sides of the doped regions of the active layer. Accordingly, impurity concentration of the two doped regions is smaller than that of the two source/drain implantation regions.

Abstract translation: 提供了制造多晶硅薄膜晶体管的方法。 该方法包括形成多晶硅有源层，顺序地在有源层上形成第一栅极绝缘层和第一栅电极，通过使用第一栅电极作为掩模在有源层上进行第一离子注入工艺以形成两个掺杂区域 在有源层的端部，顺序地在第一栅极绝缘层和第一栅电极上形成第二栅极绝缘层和第二栅电极，并且通过使用第二栅电极作为另一栅电极在有源层上进行第二离子注入工艺 掩模以在有源层的掺杂区域的两个外侧形成两个源极/漏极注入区域。 因此，两个掺杂区域的杂质浓度小于两个源极/漏极注入区域的杂质浓度。