公开(公告)号：US20240339316A1

公开(公告)日：2024-10-10

申请号：US18746799

申请日：2024-06-18

Applicant: Applied Materials, Inc.

Inventor： Aykut AYDIN ,  Rui CHENG ,  Karthik JANAKIRAMAN ,  Abhijit Basu MALLICK ,  Takehito KOSHIZAWA ,  Bo QI

IPC: H01L21/02

CPC classification number: H01L21/02123 ,  H01L21/02211 ,  H01L21/02271

Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.

公开(公告)号：US20220351982A1

公开(公告)日：2022-11-03

申请号：US17246209

申请日：2021-04-30

Applicant: Applied Materials, Inc.

Inventor： Zeqing SHEN ,  Bo QI ,  Abhijit B. MALLICK

IPC: H01L21/311 ,  H01L21/02

Abstract: Embodiments of the present disclosure generally relate to fabricating electronic devices, such as memory devices. In one or more embodiments, a method for forming a device includes forming a film stack on a substrate, where the film stack contains a plurality of alternating layers of oxide layers and nitride layers and has a stack thickness, and etching the film stack to a first depth to form a plurality of openings between a plurality of structures. The method includes depositing an etch protection liner containing amorphous-silicon on the sidewalls and the bottoms of the structures, removing the etch protection liner from at least the bottoms of the openings, forming a plurality of holes by etching the film stack in the openings to further extend each bottom of the openings to a second depth of the hole, and removing the etch protection liner from the sidewalls.

公开(公告)号：US20200381623A1

公开(公告)日：2020-12-03

申请号：US16814765

申请日：2020-03-10

Applicant: Applied Materials, Inc.

Inventor： Bo QI ,  Abhijit B. MALLICK

IPC: H01L45/00 ,  H01L27/24 ,  C23C16/34 ,  C23C16/455

Abstract: Embodiments described herein generally relate to methods of processing a substrate comprising positioning a substrate in a processing volume of a processing chamber. The substrate includes a patterned surface having a plurality of features. Individual ones of the plurality of features are defined by one or more openings formed through a multi-layer stack, and the multi-layer stack includes a chalcogen containing material. The methods further include flowing pulses of a first processing gas into the processing volume. Herein, the first processing gas includes a silicon precursor and a nitrogen precursor. The methods further include igniting and maintaining a plasma of the first processing gas. The methods further include depositing a first silicon nitride layer onto the patterned surface of the substrate. Furthermore, the methods include depositing of a second silicon nitride layer on the first silicon nitride layer.

公开(公告)号：US20240321589A1

公开(公告)日：2024-09-26

申请号：US18680496

申请日：2024-05-31

Applicant: Applied Materials, Inc.

Inventor： Zeqing SHEN ,  Bo QI ,  Abhijit B. MALLICK

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/31144 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/31111

Abstract: Embodiments of the present disclosure generally relate to fabricating electronic devices, such as memory devices. In one or more embodiments, a microelectronic device is provided and includes a film stack disposed on a substrate and a patterned hard mask disposed on an upper surface of the film stack. The film stack has a stack thickness and contains a plurality of alternating layers of oxide layers and nitride layers. The microelectronic device also includes a plurality of openings having a depth disposed between a plurality of structures, each structure has a sidewall and each opening has a bottom, the depth is less than the stack thickness, and each opening has an aspect ratio of greater than 50 relative to the depth. The microelectronic device also includes an etch protection liner disposed on the patterned hard mask and the sidewalls.

公开(公告)号：US20220406594A1

公开(公告)日：2022-12-22

申请号：US17352039

申请日：2021-06-18

Applicant: Applied Materials, Inc.

Inventor： Aykut AYDIN ,  Rui CHENG ,  Karthik JANAKIRAMAN ,  Abhijit B. MALLICK ,  Takehito KOSHIZAWA ,  Bo QI

IPC: H01L21/02

Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.