公开(公告)号：US11934240B2

公开(公告)日：2024-03-19

申请号：US17664000

申请日：2022-05-18

Applicant: Apple Inc.

Inventor： Inder M. Sodhi ,  Achmed R. Zahir ,  Carmel Yamberger ,  Daniele Perretta ,  Jan Krellner ,  Ron Neuman ,  James S. Ismail ,  Keith Cox

IPC: G06F1/28 ,  G06F1/20 ,  G06F11/30

CPC classification number: G06F1/206 ,  G06F1/28 ,  G06F11/3058

Abstract: Techniques are disclosed relating to thermal control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor thermal conditions, implement control for one or more thermal loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid thermal issues, potentially with reduced impact on processor performance relative to traditional techniques.

公开(公告)号：US20230376091A1

公开(公告)日：2023-11-23

申请号：US17664000

申请日：2022-05-18

Applicant: Apple Inc.

Inventor： Inder M. Sodhi ,  Achmed R. Zahir ,  Carmel Yamberger ,  Daniele Perretta ,  Jan Krellner ,  Ron Neuman ,  James S. Ismail ,  Keith Cox

IPC: G06F1/20 ,  G06F1/28 ,  G06F11/30

CPC classification number: G06F1/206 ,  G06F1/28 ,  G06F11/3058

Abstract: Techniques are disclosed relating to thermal control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor thermal conditions, implement control for one or more thermal loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid thermal issues, potentially with reduced impact on processor performance relative to traditional techniques.

公开(公告)号：US20240427391A1

公开(公告)日：2024-12-26

申请号：US18438782

申请日：2024-02-12

Applicant: Apple Inc.

Inventor： Inder M. Sodhi ,  Achmed R. Zahir ,  Carmel Yamberger ,  Daniele Perretta ,  Jan Krellner ,  Ron Neuman ,  James S. Ismail ,  Keith Cox

IPC: G06F1/20 ,  G06F1/28 ,  G06F11/30

Abstract: Techniques are disclosed relating to electromigration control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor operating conditions, implement control for one or more electromigration loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid electromigration issues, potentially with reduced impact on processor performance relative to traditional techniques.

公开(公告)号：US20250103117A1

公开(公告)日：2025-03-27

申请号：US18392736

申请日：2023-12-21

Applicant: Apple Inc.

Inventor： Doron Rajwan ,  Jamie L. Langlinais ,  Jan Krellner

IPC: G06F1/26

Abstract: Techniques are disclosed relating to managing power allocation for component circuits coupled to one or more power sources. A system can include a plurality of component circuits, a plurality of power sources, and a power splitter circuit. The power splitter circuit may access, from programmable registers, a mapping between ones of the plurality of component circuits and ones of the plurality of power sources. The power splitter circuit may then allocate power to a given one of the plurality of component circuits based on one or more power budgets of one or more power sources that are mapped to the given component circuit as indicated by the mapping. In various cases, the power splitter circuit may determine that multiple power sources supply power to a particular component circuit and allocate power to the particular component circuit based on respective power budgets of the multiple power sources.