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公开(公告)号:US20240412912A1
公开(公告)日:2024-12-12
申请号:US18207754
申请日:2023-06-09
Applicant: Apple Inc.
Inventor: Bo YU , Zhang JIN , Zhengan YANG
Abstract: The present disclosure describes a circuit that includes a first inductor having a first terminal and second terminal, a second inductor having a third terminal and a fourth terminal, a first capacitor circuit, and a second capacitor circuit. The first and third terminals have a same polarity. The first capacitor circuit is cross-coupled to the first terminal and the fourth terminal. The second capacitor circuit is cross-coupled to the second terminal and the third terminal. The first and second capacitor circuits adjust an electrical coupling between the first and second inductor.
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公开(公告)号:US20250132244A1
公开(公告)日:2025-04-24
申请号:US18616727
申请日:2024-03-26
Applicant: Apple Inc.
Inventor: Bo YU , Haitao Cheng , Zhongning Liu , Zhang Jin
IPC: H01L23/522 , H01G4/40 , H01L27/01
Abstract: The present disclosure describes a semiconductor structure that is resistant to induced eddy currents. The semiconductor device includes a substrate, a device layer having electronic devices on the substrate, and a metallization layer above the device layer. The first metallization layer includes first and second terminal traces, a switch, and capacitors. A first terminal of a capacitor of the capacitors is coupled to the first terminal trace via the switch. A second terminal of the capacitor is coupled to the second terminal trace. The first and second terminal traces are disposed along the same side of the capacitors.
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