For externally clocked digital audio input, determining a valid clock and muting audio during synchronization
    1.
    发明授权
    For externally clocked digital audio input, determining a valid clock and muting audio during synchronization 有权
    对于外部时钟数字音频输入,在同步期间确定有效的时钟和静音音频

    公开(公告)号:US07884741B2

    公开(公告)日:2011-02-08

    申请号:US12772907

    申请日:2010-05-03

    CPC classification number: G11B20/14 G11B20/10527 G11B2020/10546

    Abstract: Methods and apparatus for determining the existence of an external clock over a digital input port on a computer. In one embodiment, the external clock is validated, and a lock is performed when the clock is valid. Whenever a loss of the lock is detected, and, if a re-lock is likely, the apparatus is muted so that audio artifacts that would otherwise be heard are minimized. The methods and apparatus also provide automatic re-locking to the external clock when a sampling rate change is detected.

    Abstract translation: 用于确定在计算机上的数字输入端口上存在外部时钟的方法和装置。 在一个实施例中,外部时钟被验证,并且当时钟有效时执行锁定。 无论何时检测到锁的丢失,并且如果可能重新锁定,则该设备被静音,使得否则将听到的音频伪像被最小化。 当检测到采样率变化时,该方法和装置还提供对外部时钟的自动重新锁定。

    For externally clocked digital audio input, determining a valid clock and muting audio during synchronization
    2.
    发明授权
    For externally clocked digital audio input, determining a valid clock and muting audio during synchronization 有权
    对于外部时钟数字音频输入,在同步期间确定有效的时钟和静音音频

    公开(公告)号:US07710294B2

    公开(公告)日:2010-05-04

    申请号:US11551010

    申请日:2006-10-19

    CPC classification number: G11B20/14 G11B20/10527 G11B2020/10546

    Abstract: Methods and apparatus for determining the existence of an external clock over a digital input port on a computer. In one embodiment, the external clock is validated, and a lock is performed when the clock is valid. Whenever a loss of the lock is detected, and, if a re-lock is likely, the apparatus is muted so that audio artifacts that would otherwise be heard are minimized. The methods and apparatus also provide automatic re-locking to the external clock when a sampling rate change is detected.

    Abstract translation: 用于确定在计算机上的数字输入端口上存在外部时钟的方法和装置。 在一个实施例中,外部时钟被验证,并且当时钟有效时执行锁定。 无论何时检测到锁的丢失,并且如果可能重新锁定,则该设备被静音,使得否则将听到的音频伪像被最小化。 当检测到采样率变化时,该方法和装置还提供对外部时钟的自动重新锁定。

    FOR EXTERNALLY CLOCKED DIGITAL AUDIO INPUT, DETERMINING A VALID CLOCK AND MUTING AUDIO DURING SYNCHRONIZATION
    3.
    发明申请
    FOR EXTERNALLY CLOCKED DIGITAL AUDIO INPUT, DETERMINING A VALID CLOCK AND MUTING AUDIO DURING SYNCHRONIZATION 有权
    用于外部时钟数字音频输入,在同步期间确定有效时钟和静音

    公开(公告)号:US20080143566A1

    公开(公告)日:2008-06-19

    申请号:US11551010

    申请日:2006-10-19

    CPC classification number: G11B20/14 G11B20/10527 G11B2020/10546

    Abstract: The present invention provides a method and apparatus for determining the existence of an external clock over a digital input port on a computer, and, if the external clock is valid, locking to it. A loss of the lock can also be detected, and, if a re-lock is likely, the computer system is muted so that audio artifacts that would otherwise be heard are minimized. The computer system of the present invention automatically re-locks to the external clock if the clock has changed, as in the case of a change in sampling rate.

    Abstract translation: 本发明提供了一种用于通过计算机上的数字输入端口确定外部时钟的存在的方法和装置,并且如果外部时钟有效,则锁定它。 还可以检测到锁的丢失,并且如果可能重新锁定,则计算机系统被静音,使得否则将被听到的音频伪影最小化。 如果采样率改变的情况下,本发明的计算机系统如果时钟已经改变,则自动重新锁定到外部时钟。

    Increased speed of processing of audio samples received over a serial communications link by use of channel map and steering table
    4.
    发明授权
    Increased speed of processing of audio samples received over a serial communications link by use of channel map and steering table 有权
    通过使用频道映射和转向表,提高通过串行通信链路接收的音频样本的处理速度

    公开(公告)号:US08032672B2

    公开(公告)日:2011-10-04

    申请号:US11279866

    申请日:2006-04-14

    CPC classification number: G06F3/162 G06F5/065 H04L49/90 H04L49/901 H04L49/9063

    Abstract: A method and apparatus for processing data samples utilizes a channel map populated by device descriptor, or by an application program interface. Packet processing code loops through all of the samples contained in a packet while incrementing through a channel map and steering table without having to look up a table to determine in what audio buffer the sample is to be stored or read. Additionally, the present invention utilizes a stride map, so the audio subsystem knows how many samples to skip in order to reach the next sample frame. The present invention can be used for handling received packets as well as forming packets to send over a bus.

    Abstract translation: 用于处理数据样本的方法和装置利用由设备描述符填充的频道映射或应用程序接口。 分组处理代码循环遍历分组中的所有样本,同时增加通道图和转向表,而无需查找表以确定样本将要存储或读取的音频缓冲区。 此外,本发明利用步幅图,因此音频子系统知道要跳过多少个样本以便到达下一个采样帧。 本发明可以用于处理接收的分组以及形成通过总线发送的分组。

    Increased speed of processing of data received over a communications link
    6.
    发明授权
    Increased speed of processing of data received over a communications link 有权
    提高通过通信链路接收的数据的处理速度

    公开(公告)号:US08335874B2

    公开(公告)日:2012-12-18

    申请号:US13252106

    申请日:2011-10-03

    CPC classification number: G06F3/162 G06F5/065 H04L49/90 H04L49/901 H04L49/9063

    Abstract: A method and apparatus for processing data samples utilizes a channel map populated by device descriptor, or by an application program interface. Packet processing code loops through all of the samples contained in a packet while incrementing through a channel map and steering table without having to look up a table to determine in what audio buffer the sample is to be stored or read. Additionally, the present invention utilizes a stride map, so the audio subsystem knows how many samples to skip in order to reach the next sample frame. The present invention can be used for handling received packets as well as forming packets to send over a bus.

    Abstract translation: 用于处理数据样本的方法和装置利用由设备描述符填充的频道映射或应用程序接口。 分组处理代码循环遍历分组中的所有样本,同时增加通道图和转向表,而无需查找表以确定样本将要存储或读取的音频缓冲区。 此外,本发明利用步幅图,因此音频子系统知道要跳过多少个样本以便到达下一个采样帧。 本发明可以用于处理接收的分组以及形成通过总线发送的分组。

    INCREASED SPEED OF PROCESSING OF DATA RECEIVED OVER A COMMUNICATIONS LINK
    7.
    发明申请
    INCREASED SPEED OF PROCESSING OF DATA RECEIVED OVER A COMMUNICATIONS LINK 有权
    在通信链接中接收到的数据处理速度提高的速度

    公开(公告)号:US20120023274A1

    公开(公告)日:2012-01-26

    申请号:US13252106

    申请日:2011-10-03

    CPC classification number: G06F3/162 G06F5/065 H04L49/90 H04L49/901 H04L49/9063

    Abstract: A method and apparatus for processing data samples utilizes a channel map populated by device descriptor, or by an application program interface. Packet processing code loops through all of the samples contained in a packet while incrementing through a channel map and steering table without having to look up a table to determine in what audio buffer the sample is to be stored or read. Additionally, the present invention utilizes a stride map, so the audio subsystem knows how many samples to skip in order to reach the next sample frame. The present invention can be used for handling received packets as well as forming packets to send over a bus.

    Abstract translation: 用于处理数据样本的方法和装置利用由设备描述符填充的频道映射或应用程序接口。 分组处理代码循环遍历分组中的所有样本,同时增加通道图和转向表,而无需查找表以确定样本将要存储或读取的音频缓冲区。 此外,本发明利用步幅图,因此音频子系统知道要跳过多少个样本以便到达下一个采样帧。 本发明可以用于处理接收的分组以及形成通过总线发送的分组。

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