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公开(公告)号：US10454488B1
公开(公告)日：2019-10-22
申请号：US15994112
申请日：2018-05-31
Applicant: Analog Devices Global Unlimited Company
Inventor： Sandeep Monangi
Abstract: Various examples are directed to a variable speed comparator circuit comprising a first comparator, a second comparator, and a third comparator and a logic circuit. The first comparator may be configured to generate a first comparator output using a first input and a second input. The second comparator may be configured to generate a second comparator output using the first input and the second input. The third comparator may be configured to generate a third comparator output using the first input and the second input. A propagation delay of the second comparator may be less than a propagation delay of the first comparator. Also, a propagation delay of the third comparator may be less than the propagation delay of the second comparator. The second comparator may have an input offset relative to the third comparator. The logic circuit may be configured to determine that the second comparator output and the third comparator output are not equivalent and set a comparator circuit output to the first comparator output.
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Patent Agency Ranking
公开(公告)号：US10528070B2
公开(公告)日：2020-01-07
申请号：US15969175
申请日：2018-05-02
Applicant: Analog Devices Global Unlimited Company
Inventor： Michael C. W. Coln , Michael Mueck , Quan Wan , Sandeep Monangi
Abstract: A low-noise, low-power reference voltage circuit can include an operational transconductance amplifier (OTA) with inputs coupled to a temperature-compensated voltage, such as can be provided by source-coupled first and second field-effect transistors (FETs) having different threshold voltages. A capacitive voltage divider can feed back a portion of a reference voltage output by the OTA to the inputs of the OTA to help establish or maintain the temperature-compensated voltage across the inputs of the OTA. A switching network can be used, such as initialize the capacitive voltage divider or other capacitive feedback circuit, such as during power-down cycles, or when resuming powered-on cycles. A switch can interrupt current to the OTA during the power-down cycles to save power. The cycled voltage reference circuit can provide a reference voltage to an ADC reservoir capacitor. Powering down can occur during analog input signal sampling, during successive approximation routine (SAR) conversion, or both.
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公开(公告)号：US20190339730A1
公开(公告)日：2019-11-07
申请号：US15969175
申请日：2018-05-02
Applicant: Analog Devices Global Unlimited Company
Inventor： Michael C.W. Coln , Michael Mueck , Quan Wan , Sandeep Monangi
Abstract: A low-noise, low-power reference voltage circuit can include an operational transconductance amplifier (OTA) with inputs coupled to a temperature-compensated voltage, such as can be provided by source-coupled first and second field-effect transistors (FETs) having different threshold voltages. A capacitive voltage divider can teed back a portion of a reference voltage output by the OTA to the inputs of the OTA to help establish or maintain the temperature-compensated voltage across the inputs of the OTA. A switching network can be used, such as initialize the capacitive voltage divider or other capacitive feedback circuit, such as during power-down cycles, or when resuming powered-on cycles. A switch can interrupt current to the OTA during the power-down cycles to save power. The cycled voltage reference circuit can provide a reference voltage to an ADC reservoir capacitor. Powering down can occur during analog input signal sampling, during successive approximation routine (SAR) conversion, or both.
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公开(公告)号：US20200021305A1
公开(公告)日：2020-01-16
申请号：US16032752
申请日：2018-07-11
Applicant: Analog Devices Global Unlimited Company
Inventor： Sandeep Monangi
Abstract: A differential digital-to-analog (DAC) circuit that can include a reservoir capacitor and various switches to couple the bottom plates of the input capacitors, e.g., bit-trial capacitors, to reference voltages, e.g., REF+ or REF−. In this manner, the reservoir capacitor can be used to provide any differential charge to the input capacitors, e.g., bit-trial capacitors, and the reference voltages, e.g., REF+ and REF−, can be used to provide any common mode charge to the input capacitors.
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公开(公告)号：US10516411B1
公开(公告)日：2019-12-24
申请号：US16032752
申请日：2018-07-11
Applicant: Analog Devices Global Unlimited Company
Inventor： Sandeep Monangi
Abstract: A differential digital-to-analog (DAC) circuit that can include a reservoir capacitor and various switches to couple the bottom plates of the input capacitors, e.g., bit-trial capacitors, to reference voltages, e.g., REF+ or REF−. In this manner, the reservoir capacitor can be used to provide any differential charge to the input capacitors, e.g., bit-trial capacitors, and the reference voltages, e.g., REF+ and REF−, can be used to provide any common mode charge to the input capacitors.
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公开(公告)号：US10348319B1
公开(公告)日：2019-07-09
申请号：US15983658
申请日：2018-05-18
Applicant: Analog Devices Global Unlimited Company
Abstract: Techniques to use reservoir capacitors in ADC to supply most of the charge to bit-trial capacitors as bit-trials are performed. An accurate reference voltage source, e.g., a reference buffer circuit, only needs to supply the difference, e.g., an inaccuracy, in the charge supplied by the reservoir capacitors. Instead of having to resettle for each bit-trial, the accurate reference voltage source has only to deliver the initial charge to the reservoir capacitors during acquisition and once more when the ADC is ready to sample onto the residue amplifier. These techniques can ease the demands on the reference buffer circuit and requirement of external decoupling capacitors, for example.
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