公开(公告)号：US12299455B1

公开(公告)日：2025-05-13

申请号：US16795264

申请日：2020-02-19

Applicant: Amazon Technologies, Inc.

Inventor： Shuwei Teng ,  Darin Lee Frink

IPC: G06F9/38 ,  G06F9/50 ,  G06F11/20 ,  G06F15/173 ,  G06F15/177 ,  G06F15/78

Abstract: A server computer can have multiple potential configurations depending on a state of an input signal. Interconnect buses between processors in a server computer can be reconfigured on startup or dynamically (“hot add/drop”) by one or more multiplexers, thereby allowing the server computer to be flexibly partitioned into custom arrangements of processors, to maximize or change interconnect bandwidth between connected processors in a partition, or to minimize or reduce impact (“blast radius”) due to failed processors or interconnect buses. Each processor can have its own configuration logic to allow partitioning of the server computer as small as a single socket. In an alternative configuration, a common configuration logic can be partitioned and act as separate configuration logics for each partition.

公开(公告)号：US11029973B1

公开(公告)日：2021-06-08

申请号：US16362244

申请日：2019-03-22

Applicant: Amazon Technologies, Inc.

Inventor： Shuwei Teng

IPC: G06F11/00 ,  G06F9/445 ,  G06F11/20 ,  G06F9/4401

Abstract: A server computer can have multiple potential configurations depending on a state of an input signal. In a first potential configuration, a single-platform model is used with multiple processors booted using a single BIOS. The multiple processors can have a bus there between allowing processor-to-processor communication. In a second potential configuration, a multi-platform model is used with multiple processors booted using separate BIOS. In this configuration, the bus between the processors is disabled so that the platforms operate autonomously. The hardware can be extended to support additional processors, such as 4, 8, etc. A failover mode also allows the hardware to detect a hardware error (e.g., bus error) and dynamically reconfigure the processors to use an alternative bus. With the failover, the addressing of the processors can be modified to reconfigure the server computer to compensate for the hardware error.