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公开(公告)号:US12001352B1
公开(公告)日:2024-06-04
申请号:US17937395
申请日:2022-09-30
Applicant: Amazon Technologies, Inc.
Inventor: Rashika Kheria , Ron Diamant , Se Wang Oh , Guy Nakibly
CPC classification number: G06F13/1621 , G06F9/466
Abstract: Techniques are provided to maintain data coherency for data transfers among data processing devices in a distributed computing environment. A data buffer in each data processing device can be mapped to an address range that is assigned to transactions that allow out-of-order completions, and a message buffer in each data processing device can be mapped to an address range that is assigned to transactions that follow transaction ordering. Thus, a transaction to store a set of data into the data buffer is completed before a transaction to write a synchronization message in the message buffer indicating that the set of data is stored in the data buffer based on the mapping irrespective of the transaction ordering indicated by each transaction.
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公开(公告)号:US11606104B1
公开(公告)日:2023-03-14
申请号:US17545846
申请日:2021-12-08
Applicant: Amazon Technologies, Inc.
Inventor: Avigdor Segal , Leonid Baryudin , Erez Izenberg , Erez Sabbag , Se Wang Oh , Noga Smith
Abstract: The integrity of transmitted data can be protected by causing that data to be transmitted twice, and calculating protection information (PI) for the data from each transmission. The PI can include information such as a checksum or signature that should have the same value if the data from each transmission is the same. If the PI values are not the same, an error handling procedure can be activated, such as may retry the transmission. For write operations, the data can be transmitted twice from a source to a storage destination, while for read operations, the data can be transmitted to a recipient then sent back from the recipient to the storage device, with PI calculated for each transmission. A component such as a storage processor can perform at least this comparison step. Such approaches can also be used for network transmission or high performance computing.
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