公开(公告)号：US12236260B1

公开(公告)日：2025-02-25

申请号：US17643572

申请日：2021-12-09

Applicant: Amazon Technologies, Inc.

Inventor： Dan Saad ,  Guy Nakibly ,  Lev Vaskevich ,  Aviv Bonomo

IPC: G06F9/46 ,  G06F9/54

Abstract: An address decoder for a system is disclosed that can be used for different source nodes in the system. Each address decoder can be configured to perform a plurality of decode methods that can be customized for each source node. A first decode method can be used to determine a target node from a plurality of target nodes based on a destination address of the transaction. A second decode method can be used to assign a dedicated target node as the target node irrespective of the destination address of the transaction. The second decode method can be used to route the transaction to the dedicated target node for testing and verification operations.

公开(公告)号：US11640366B1

公开(公告)日：2023-05-02

申请号：US17457812

申请日：2021-12-06

Applicant: Amazon Technologies, Inc.

Inventor： Dan Saad ,  Guy Nakibly ,  Yaniv Shapira ,  Aviv Bonomo ,  Moshe Gutman

IPC: G06F13/362 ,  G06F13/42 ,  G06F13/40 ,  G06F15/78 ,  G06F9/46

Abstract: An address decoder for a source node in a multi-chip system is disclosed, which can perform parallel decoding steps to determine whether a transaction from the source node is addressed to a target node in a local integrated circuit (IC) or a remote IC, and whether the source node is allowed to access that target node. Based on the outcome of both the decoding steps, the transaction can be either blocked by the address decoder, or routed to the target node. If the transaction is addressed to the remote IC, but the source node is not allowed to access the target node on the remote IC, the transaction can be terminated by the address decoder in the local IC.