公开(公告)号：US10318153B2

公开(公告)日：2019-06-11

申请号：US14576912

申请日：2014-12-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Mitesh Ramesh Meswani ,  Gabriel H. Loh ,  Mauricio Breternitz, Jr. ,  Mark Richard Nutter ,  John Robert Slice ,  David Andrew Roberts ,  Michael Ignatowski ,  Mark Henry Oskin

IPC: G06F3/06

Abstract: A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g., computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.

公开(公告)号：US20250041721A1

公开(公告)日：2025-02-06

申请号：US18529441

申请日：2023-12-05

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Aaron Michael Knoll ,  Binh Huy Le ,  Madhusudhanan Srinivasan ,  Mark Richard Nutter

IPC: A63F13/52 ,  A63F13/355

Abstract: A server employs a shared raytracing context to generate video streams for multiple client devices. The server uses the shared raytracing context to perform raytracing operations for each of the client devices, and based on the raytracing operations generates different sets of image frames. The server then streams each set of image frames to a corresponding client device over a network.

公开(公告)号：US20160179382A1

公开(公告)日：2016-06-23

申请号：US14576912

申请日：2014-12-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Mitesh Ramesh Meswani ,  Gabriel H. Loh ,  Mauricio Breternitz, JR. ,  Mark Richard Nutter ,  John Robert Slice ,  David Andrew Roberts ,  Michael Ignatowski ,  Mark Henry Oskin

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/061 ,  G06F3/0634 ,  G06F3/0673 ,  G06F3/0685

Abstract: A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g.,. computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.

Abstract translation: 处理器基于在处理器上执行的应用的应用阶段的变化来修改多层存储器层级的一系列存储器位置的存储器管理模式。 处理器监视执行应用程序的应用阶段（例如，计算限制阶段，输入/输出阶段或存储器访问阶段）并且响应于阶段的改变来咨询管理策略以识别存储器管理模式。 处理器自动重新配置存储器控制器和其他模块，使得根据所识别的存储器管理模式来管理多级存储器层级的一系列存储器位置。 通过根据应用阶段改变存储器位置范围的存储器管理模式，处理器提高了处理效率和灵活性。