公开(公告)号：US11880312B2

公开(公告)日：2024-01-23

申请号：US17539189

申请日：2021-11-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Kishore Punniyamurthy ,  SeyedMohammad SeyedzadehDelcheh ,  Sergey Blagodurov ,  Ganesh Dasika ,  Jagadish B Kotra

IPC: G06F12/00 ,  G06F12/126 ,  G06F12/0855

CPC classification number: G06F12/126 ,  G06F12/0859 ,  G06F2212/1024 ,  G06F2212/6042

Abstract: A method includes storing a function representing a set of data elements stored in a backing memory and, in response to a first memory read request for a first data element of the set of data elements, calculating a function result representing the first data element based on the function.

公开(公告)号：US20240211393A1

公开(公告)日：2024-06-27

申请号：US18146509

申请日：2022-12-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Jagadish B Kotra ,  Dong Kai Wang

IPC: G06F12/02 ,  G06F12/0802

CPC classification number: G06F12/0292 ,  G06F12/0802

Abstract: In accordance with the described techniques for leveraging processing in memory registers as victim buffers, a computing device includes a memory, a processing in memory component having registers for data storage, and a memory controller having a victim address table that includes at least one address of a row of the memory that is stored in the registers. The memory controller receives a request to access the row of the memory and accesses data of the row from the registers based on the address of the row being included in the victim address table.

公开(公告)号：US12147338B2

公开(公告)日：2024-11-19

申请号：US18146509

申请日：2022-12-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Jagadish B Kotra ,  Dong Kai Wang

IPC: G06F12/02 ,  G06F12/0802

Abstract: In accordance with the described techniques for leveraging processing in memory registers as victim buffers, a computing device includes a memory, a processing in memory component having registers for data storage, and a memory controller having a victim address table that includes at least one address of a row of the memory that is stored in the registers. The memory controller receives a request to access the row of the memory and accesses data of the row from the registers based on the address of the row being included in the victim address table.

公开(公告)号：US12050531B2

公开(公告)日：2024-07-30

申请号：US17952697

申请日：2022-09-26

Applicant: Advanced Micro Devices, Inc.

Inventor： Kishore Punniyamurthy ,  Jagadish B Kotra

IPC: G06F12/02

CPC classification number: G06F12/0292 ,  G06F2212/1024 ,  G06F2212/401

Abstract: In accordance with the described techniques for data compression and decompression for processing in memory, a page address is received by a processing in memory component that maps to a first location in memory where data of a page is maintained. The data of the page is compressed by the processing in memory component. Further, compressed data of the page is written by the processing in memory component to a compressed block device responsive to the compressed data satisfying one or more compressibility criteria. The compressed block device is a portion of the memory dedicated to storing data in a compressed form.

公开(公告)号：US20240104015A1

公开(公告)日：2024-03-28

申请号：US17952697

申请日：2022-09-26

Applicant: Advanced Micro Devices, Inc.

Inventor： Kishore Punniyamurthy ,  Jagadish B Kotra

IPC: G06F12/02

CPC classification number: G06F12/0292 ,  G06F2212/1024 ,  G06F2212/401

Abstract: In accordance with the described techniques for data compression and decompression for processing in memory, a page address is received by a processing in memory component that maps to a first location in memory where data of a page is maintained. The data of the page is compressed by the processing in memory component. Further, compressed data of the page is written by the processing in memory component to a compressed block device responsive to the compressed data satisfying one or more compressibility criteria. The compressed block device is a portion of the memory dedicated to storing data in a compressed form.