公开(公告)号：US4057711A

公开(公告)日：1977-11-08

申请号：US667960

申请日：1976-03-17

申请人： Abhaya Asthana ,  George Hannauer

发明人： Abhaya Asthana ,  George Hannauer

IPC分类号： G06J1/00

CPC分类号： G06J1/00

摘要： An analog switching system having fan-out for switching a plurality of inputs coupled to analog signal sources with respect to a plurality of outputs coupled to analog signal destinations. A three stage switch matrix includes input, middle and output switch blocks with each block having a plurality of analog switch means and latching means. Any one input terminal of a switch block may be connected to any one or more of the output terminals of that block. A matrix controller coupled to each of the switch blocks addresses each switch block and actuates at least one of the latching means to provide a connection assignment for at least one of the analog switching means.

摘要翻译： 一种模拟切换系统，具有扇出，用于相对于耦合到模拟信号目的地的多个输出切换耦合到模拟信号源的多个输入。 三级开关矩阵包括输入，中间和输出开关块，每个块具有多个模拟开关装置和锁存装置。 开关块的任何一个输入端子可以连接到该块的任何一个或多个输出端子。 耦合到每个开关块的矩阵控制器解决每个开关块并致动锁存装置中的至少一个以提供至少一个模拟开关装置的连接分配。

公开(公告)号：US4061904A

公开(公告)日：1977-12-06

申请号：US663297

申请日：1976-03-03

申请人： George Hannauer ,  Abhaya Asthana

发明人： George Hannauer ,  Abhaya Asthana

IPC分类号： G06J1/00 ,  G06G7/28

CPC分类号： G06J1/00

摘要： A variable analog function generator which is independent of an external computer during the time that it generates at least one predetermined output function of at least one input variable. The output function is expressed in terms of hybrid variables each having an analog portion and a digital portion. The function generator has a first dedicated memory which is loaded during set up time with data related to breakpoints defining the input variable. A second dedicated memory is loaded during set up time with tables of values defining the digital portion. During function generation, the analog portions are generated in response to (1) the input variable and (2) the data related to the breakpoints which is accessed in parallel from the first dedicated memory. The output function is generated in response to (1) the analog portions and (2) the tables of values accessed from the second dedicated memory.

摘要翻译： 可变模拟函数发生器，其在产生至少一个输入变量的至少一个预定输出函数的时间内独立于外部计算机。 输出功能以混合变量表示，每个混合变量具有模拟部分和数字部分。 函数发生器具有第一专用存储器，其在设置时间期间与与定义输入变量的断点相关的数据加载。 在设置时间期间，第二专用存储器加载了定义数字部分的值表。 在功能生成期间，响应于（1）输入变量和（2）与从第一专用存储器并行访问的断点相关的数据产生模拟部分。 响应于（1）模拟部分和（2）从第二专用存储器访问的值表生成输出功能。