System and method for round robin arbiters in a network-on-chip (NoC)

    公开(公告)号:US11782834B2

    公开(公告)日:2023-10-10

    申请号:US17692170

    申请日:2022-03-11

    Applicant: ARTERIS, INC.

    Inventor: Boon Chuan

    CPC classification number: G06F12/0828 G06F9/4881 G06F13/37 G06F2212/621

    Abstract: In a network-on-chip (NoC) interconnect connected to one or more agents with multiple input ports, one or more switches are provided with a round robin arbiter constructed to use representations of the input ports and, in some embodiments, the current round robin state, as thermometer codes. By using thermometer code to represent port information, the correspondence to the current input and the current state to be granted can be rapidly determined through a simple two-step AND and XOR operations. With such a simple logical procedure, the number of steps to make the determination, and therefore the energy required, can be reduced by log 2(n) steps or up to 43%. Using thermometer code reduces the number of computations required. Hence, the number of logic circuit elements required to carry out the calculation is reduced, shrinking the floorplan area needed for the arbiter.

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