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公开(公告)号：US20150270805A1
公开(公告)日：2015-09-24
申请号：US14223650
申请日：2014-03-24
Applicant: ANALOG DEVICES GLOBAL
CPC classification number: H03F1/02 , H03F1/0277 , H03F3/45076 , H03F3/45475 , H03F3/45968 , H03F2200/234 , H03F2203/45288
Abstract: Apparatus and methods for autozero amplifiers are provided herein. In certain configurations, an autozero amplifier includes at least three transconductance stages and an autozero timing control circuit configured to control an autozero sequence of the transconductance stages. The autozero timing control circuit can stagger autozeroing of the transconductance stages, such that a relatively small amount of the amplifier's amplification circuitry is connected to or disconnected from the amplifier's signal path at any given time. For example, in certain configurations, when one of the transconductance stages in autozeroed over a particular time interval, the remaining transconductance stages can operate in parallel to provide amplification during that time interval.
Abstract translation: 本文提供了用于自动调零放大器的装置和方法。 在某些配置中，自动调零放大器包括至少三个跨导级和被配置为控制跨导级的自动调零序列的自动调零定时控制电路。 自动调零定时控制电路可以错开跨导级的自动调零，使得相对较少量的放大器的放大电路在任何给定的时间与放大器的信号路径相连或断开。 例如，在某些配置中，当在特定时间间隔内自动归零的跨导级之一时，剩余的跨导级可以并行操作以在该时间间隔期间提供放大。
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公开(公告)号：US09294037B2
公开(公告)日：2016-03-22
申请号：US14223650
申请日：2014-03-24
Applicant: ANALOG DEVICES GLOBAL
CPC classification number: H03F1/02 , H03F1/0277 , H03F3/45076 , H03F3/45475 , H03F3/45968 , H03F2200/234 , H03F2203/45288
Abstract: Apparatus and methods for autozero amplifiers are provided herein. In certain configurations, an autozero amplifier includes at least three transconductance stages and an autozero timing control circuit configured to control an autozero sequence of the transconductance stages. The autozero timing control circuit can stagger autozeroing of the transconductance stages, such that a relatively small amount of the amplifier's amplification circuitry is connected to or disconnected from the amplifier's signal path at any given time. For example, in certain configurations, when one of the transconductance stages in autozeroed over a particular time interval, the remaining transconductance stages can operate in parallel to provide amplification during that time interval.
Abstract translation: 本文提供了用于自动调零放大器的装置和方法。 在某些配置中，自动调零放大器包括至少三个跨导级和被配置为控制跨导级的自动调零序列的自动调零定时控制电路。 自动调零定时控制电路可以错开跨导级的自动调零，使得相对较少量的放大器的放大电路在任何给定的时间与放大器的信号路径相连或断开。 例如，在某些配置中，当在特定时间间隔内自动归零的跨导级之一时，剩余的跨导级可以并行操作以在该时间间隔期间提供放大。
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公开(公告)号：US20180302101A1
公开(公告)日：2018-10-18
申请号：US15485919
申请日：2017-04-12
Applicant: Analog Devices Global
Inventor： Avinash Gutta , Venkata Aruna Srikanth Nittala , Abhilasha Kawle
IPC: H03M3/00
Abstract: A delta sigma modulator circuit comprises a forward circuit path including a first integrator stage and an analog-to-digital converter (ADC) circuit, wherein a transfer function of the forward circuit path includes a signal gain element of m, wherein m is a positive integer; an input path to the first integrator stage, wherein a transfer function of the input path includes a signal gain element of l/m; and a feedback circuit path operatively coupled to an output of the ADC circuit and an inverting input of an op amp of the first integrator stage, wherein the feedback circuit path includes at least a first digital-to-analog converter (DAC) circuit and a transfer function of the feedback circuit path includes a signal gain element of l/m.
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公开(公告)号：US10103744B1
公开(公告)日：2018-10-16
申请号：US15485919
申请日：2017-04-12
Applicant: Analog Devices Global
Inventor： Avinash Gutta , Venkata Aruna Srikanth Nittala , Abhilasha Kawle
Abstract: A delta sigma modulator circuit comprises a forward circuit path including a first integrator stage and an analog-to-digital converter (ADC) circuit, wherein a transfer function of the forward circuit path includes a signal gain element of m, wherein m is a positive integer; an input path to the first integrator stage, wherein a transfer function of the input path includes a signal gain element of l/m; and a feedback circuit path operatively coupled to an output of the ADC circuit and an inverting input of an op amp of the first integrator stage, wherein the feedback circuit path includes at least a first digital-to-analog converter (DAC) circuit and a transfer function of the feedback circuit path includes a signal gain element of l/m.
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