公开(公告)号：US11847062B2

公开(公告)日：2023-12-19

申请号：US17552703

申请日：2021-12-16

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Tarun Nakra ,  Jay Fleischman ,  Gautam Tarasingh Hazari ,  Akhil Arunkumar ,  William L. Walker ,  Gabriel H. Loh ,  John Kalamatianos ,  Marko Scrbak

IPC: G06F12/0897 ,  G06F12/0891

CPC classification number: G06F12/0897 ,  G06F12/0891 ,  G06F2212/1028

Abstract: In response to eviction of a first clean data block from an intermediate level of cache in a multi-cache hierarchy of a processing system, a cache controller accesses an address of the first clean data block. The controller initiates a fetch of the first clean data block from a system memory into a last-level cache using the accessed address.

公开(公告)号：US20230195643A1

公开(公告)日：2023-06-22

申请号：US17552703

申请日：2021-12-16

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Tarun Nakra ,  Jay Fleischman ,  Gautam Tarasingh Hazari ,  Akhil Arunkumar ,  William L. Walker ,  Gabriel H. Loh ,  John Kalamatianos ,  Marko Scrbak

IPC: G06F12/0897 ,  G06F12/0891

CPC classification number: G06F12/0897 ,  G06F12/0891 ,  G06F2212/1028

Abstract: In response to eviction of a first clean data block from an intermediate level of cache in a multi-cache hierarchy of a processing system, a cache controller accesses an address of the first clean data block. The controller initiates a fetch of the first clean data block from a system memory into a last-level cache using the accessed address.