摘要:
A dual mode charge pump is operable in a first mode or a second mode for providing positive and negative output voltages that can be stabilized by adjusting the charging time of two terminals of a flying capacitor or by adjusting the charging/discharging time of the positive and negative voltage output terminals. The dual mode charge pump can apply to a much wider input supply voltage range with less numbers of power switches, thus requiring less die area and lower costs. Moreover, the dual mode charge pump can precisely define a common mode voltage, thus making the common voltage drift smaller and less load dependent, especially when the output supply voltages are under different load conditions.
摘要:
A conversion circuit is provided for a 1.5-bit Σ-Δ class-D amplifier to improve the feedback linearity of the class-D amplifier, by periodically inverting and mixing a first positive feedback signal and a first negative feedback signal from the power stage of the class-D amplifier to generate a second positive feedback signal and a second negative feedback signal with better linearity for feedback control in the class-D amplifier.
摘要:
A dual mode charge pump is operable in a first mode or a second mode for providing positive and negative output voltages that can be stabilized by adjusting the charging time of two terminals of a flying capacitor or by adjusting the charging/discharging time of the positive and negative voltage output terminals. The dual mode charge pump can apply to a much wider input supply voltage range with less numbers of power switches, thus requiring less die area and lower costs. Moreover, the dual mode charge pump can precisely define a common mode voltage, thus making the common voltage drift smaller and less load dependent, especially when the output supply voltages are under different load conditions.
摘要:
A sigma-delta class-D amplifier includes a quantizer to quantize an input to produce a digital signal, and an output stage to produce an output according to the digital signal. The quantizer has a smaller step size so that the digital signal has at least five logical levels, and the sigma-delta class-D amplifier is thus improved to have wider stable modulation range and less switching loss.
摘要:
A conversion circuit is provided for a 1.5-bit Σ-Δ class-D amplifier to improve the feedback linearity of the class-D amplifier, by periodically inverting and mixing a first positive feedback signal and a first negative feedback signal from the power stage of the class-D amplifier to generate a second positive feedback signal and a second negative feedback signal with better linearity for feedback control in the class-D amplifier.
摘要:
A sigma-delta class-D amplifier includes a quantizer to quantize an input to produce a digital signal, and an output stage to produce an output according to the digital signal. The quantizer has a smaller step size so that the digital signal has at least five logical levels, and the sigma-delta class-D amplifier is thus improved to have wider stable modulation range and less switching loss.