公开(公告)号：US20180004944A1

公开(公告)日：2018-01-04

申请号：US15543501

申请日：2016-01-12

Applicant: NATIONAL UNIVERSITY CORPORATION KOBE UNIVERSITY ,  TELECOM PARISTECH

Inventor： Makoto NAGATA ,  Jean-Luc DANGER ,  Daisuke FUJIMOTO ,  Shivam BHASIN

IPC: G06F21/55 ,  G01R31/28

CPC classification number: G06F21/556 ,  G01R31/2884 ,  G01R31/31719 ,  G06F11/22 ,  H01L21/822 ,  H01L27/04 ,  H04L9/10

Abstract: Provided is an on-chip monitor circuit mounted on a semiconductor chip that is equipped with a security function module for performing a security function process on an input signal and outputting a security function signal, the on-chip monitor circuit comprising a monitor circuit for monitoring signal waveforms of the semiconductor chip, wherein the circuit is provided with a first storage means for storing data that designates a window period in which to perform a test of the semiconductor chip, and a control means for performing control to operate the circuit during the window period, when a prescribed test signal is inputted to the security function module. By using the on-chip monitor circuit in a semiconductor chip of which security is required, security attacks, e.g., a Trojan horse or the like, intended to embed a malicious circuit in the production stage of security function module-equipped semiconductors chips, can be prevented.

公开(公告)号：US10776484B2

公开(公告)日：2020-09-15

申请号：US15543501

申请日：2016-01-12

Applicant: NATIONAL UNIVERSITY CORPORATION KOBE UNIVERSITY ,  TELECOM PARISTECH

Inventor： Makoto Nagata ,  Jean-Luc Danger ,  Daisuke Fujimoto ,  Shivam Bhasin

IPC: G06F21/00 ,  G06F21/55 ,  G06F11/22 ,  H01L21/822 ,  H04L9/10 ,  H01L27/04 ,  G01R31/28 ,  G01R31/317

Abstract: Provided is an on-chip monitor circuit mounted on a semiconductor chip that is equipped with a security function module for performing a security function process on an input signal and outputting a security function signal, the on-chip monitor circuit comprising a monitor circuit for monitoring signal waveforms of the semiconductor chip, wherein the circuit is provided with a first storage means for storing data that designates a window period in which to perform a test of the semiconductor chip, and a control means for performing control to operate the circuit during the window period, when a prescribed test signal is inputted to the security function module. By using the on-chip monitor circuit in a semiconductor chip of which security is required, security attacks, e.g., a Trojan horse or the like, intended to embed a malicious circuit in the production stage of security function module-equipped semiconductors chips, can be prevented.