公开(公告)号：US20090194858A1

公开(公告)日：2009-08-06

申请号：US12025824

申请日：2008-02-05

申请人： Sung-Ho Youn ,  Hyeong-No Kim

发明人： Sung-Ho Youn ,  Hyeong-No Kim

IPC分类号： H01L23/495 ,  H01L21/56

CPC分类号： H01L23/49822 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/49534 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a hybrid carrier and a method for making the same. The hybrid carrier has a plurality of interconnection leads, so that a wire bondable semiconductor device or a flip chip die apparatus can be placed on the hybrid carrier, and is electrically connected to die paddle and bond fingers. Also, it is easy to dispose a semiconductor device on the hybrid carrier and easy to electrically bond the hybrid carrier and the semiconductor device. Therefore, the hybrid carrier and the method for making the same can be applied to an area array metal CSP easily, and the method of the present invention is simple, so the production cost can be reduced.

摘要翻译： 本发明涉及一种混合载体及其制备方法。 混合载体具有多个互连引线，使得可焊接半导体器件或倒装芯片裸片装置可以放置在混合载体上，并且电连接到管芯焊盘和结合指状物。 此外，容易将半导体器件配置在混合载体上并且易于电耦合杂化载体和半导体器件。 因此，混合载体及其制造方法可以容易地应用于区域阵列金属CSP，本发明的方法简单，因此可以降低生产成本。

公开(公告)号：US20090127682A1

公开(公告)日：2009-05-21

申请号：US11941309

申请日：2007-11-16

申请人： Hyeongno Kim ,  Sung-Ho Youn

发明人： Hyeongno Kim ,  Sung-Ho Youn

IPC分类号： H01L23/495 ,  H01L21/58

CPC分类号： H01L23/49861 ,  H01L21/4832 ,  H01L23/3121 ,  H01L23/49558 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2221/68377 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of fabricating a chip package structure is provided. A metallic plate having a first surface, a second surface, and a first patterned metallic layer formed on the first surface thereof is provided. A half-etching process is performed to form first recesses on the first surface of the metallic plate, wherein leads are defined on the metallic plate by the first recesses. A first insulating material fills in each of the first recesses. A second patterned metallic layer is formed on the second surface of the metallic plate. A half-etching process is performed to form second recesses on the second surface of the metallic plate. The second recesses correspond to the first recesses, respectively, and expose the first insulating material inside the first recesses, such that the leads are electrically isolated from one another. A chip is placed on the metallic plate and electrically connected thereto.

摘要翻译： 提供了一种制造芯片封装结构的方法。 提供了具有形成在其第一表面上的第一表面，第二表面和第一图案化金属层的金属板。 执行半蚀刻工艺以在金属板的第一表面上形成第一凹槽，其中通过第一凹槽在金属板上限定引线。 第一绝缘材料填充在每个第一凹部中。 第二图案化的金属层形成在金属板的第二表面上。 执行半蚀刻工艺以在金属板的第二表面上形成第二凹槽。 第二凹部分别对应于第一凹部，并且将第一绝缘材料暴露在第一凹部内部，使得引线彼此电隔离。 将芯片放置在金属板上并与其电连接。

公开(公告)号：US07208341B2

公开(公告)日：2007-04-24

申请号：US10855557

申请日：2004-05-28

申请人： Kwang-Tae Lee ,  Sung-Gue Lee ,  Sang-Hyuck Nam ,  Sung-Ho Youn ,  Young-Kyu Lee

发明人： Kwang-Tae Lee ,  Sung-Gue Lee ,  Sang-Hyuck Nam ,  Sung-Ho Youn ,  Young-Kyu Lee

IPC分类号： H01L21/48 ,  H01L21/4763

CPC分类号： H05K3/28 ,  H05K3/243 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/025 ,  H05K2203/0577 ,  Y10T29/49155

摘要： A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of the exposed terminal portion with gold, and electrically connecting the pad portion and the terminal portion.

摘要翻译： 印刷电路板的制造方法包括：在多层绝缘材料中形成内部电路图案，在绝缘材料的某些部分形成多个通孔，并形成外部电路图形，该外部电路图形与内部 在通孔的内周面和绝缘材料的表面上形成电路图形，以及端子部分; 在所述绝缘材料的整个表面和所述外部电路图案的整个表面上形成第一光阻焊层，并且通过去除所述第一光阻焊层的特定部分来暴露所述端子部分; 研磨第一光阻焊层的表面; 在第一光阻焊层的表面上印刷第二光阻焊层，并通过去除第二光阻焊层的特定部分将端子部分暴露于外部; 以及通过用暴露的端子部分的表面镀金形成焊盘部分，并且电连接焊盘部分和端子部分。

公开(公告)号：USD667800S1

公开(公告)日：2012-09-25

申请号：US29393824

申请日：2011-06-09

申请人： Seung Hwan Choi ,  Jung Kyu Park ,  Young Sik Jeong ,  Jin Mo Kim ,  Sung Ho Youn ,  Man Ki Hong ,  Churl Wung Shin ,  Tae Heon Han

设计人： Seung Hwan Choi ,  Jung Kyu Park ,  Young Sik Jeong ,  Jin Mo Kim ,  Sung Ho Youn ,  Man Ki Hong ,  Churl Wung Shin ,  Tae Heon Han

公开(公告)号：US07939379B2

公开(公告)日：2011-05-10

申请号：US12025824

申请日：2008-02-05

申请人： Sung-Ho Youn ,  Hyeong-No Kim

发明人： Sung-Ho Youn ,  Hyeong-No Kim

IPC分类号： H01L21/00

CPC分类号： H01L23/49822 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/49534 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A hybrid carrier and a method for making the same, wherein the hybrid carrier has a plurality of interconnection leads, so that a wire bondable semiconductor device or a flip chip die apparatus can be placed on the hybrid carrier, and is electrically connected to die paddle and bond fingers. Also, it is easy to dispose a semiconductor device on the hybrid carrier and easy to electrically bond the hybrid carrier and the semiconductor device. Therefore, the hybrid carrier and the method for making the same can be applied to an area array metal CSP easily, and the method is simple, so the production cost can be reduced.

摘要翻译： 一种混合载波及其制造方法，其中混合载波具有多个互连引线，使得可焊接半导体器件或倒装晶片管芯器件可以放置在混合载体上，并且电连接到管芯焊盘 并粘合手指。 此外，容易将半导体器件配置在混合载体上并且易于电耦合杂化载体和半导体器件。 因此，混合载体及其制造方法可以容易地应用于区域阵列金属CSP，并且该方法简单，因此可以降低生产成本。